MAX9879
Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
ACKNOWLEDGE FROM MAX9879
Sr SLAVE ADDRESS
ACKNOWLEDGE FROM MAX9879
REGISTER ADDRESS
ACKNOWLEDGE FROM MAX9879
SLAVE ADDRESS
A
P
S
0
A
A
1
A
DATA BYTE
1 BYTE
R/W
REPEATED START
R/W
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 12. Reading n Bytes of Indexed Data from the MAX9879
OUT+
OUT-
Read Data Format
Send the slave address with the R/W bit set to 1 to initi-
ate a read operation. The MAX9879 acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START (S) command fol-
lowed by a read command resets the address pointer
to register 0x00. The first byte transmitted from the
MAX9879 is the contents of register 0x00. Transmitted
data is valid on the rising edge of SCL. The address
pointer autoincrements after each read data byte. This
autoincrement feature allows all registers to be read
sequentially within one continuous frame. A STOP (P)
condition can be issued after any number of read data
bytes. If a STOP (P) condition is issued followed by
another read operation, the first data byte to be read
will be from register 0x00.
MAX9879
Figure 13. Optional Ferrite Bead Filter
filters add cost, increase the solution size of the amplifier,
and can decrease efficiency and THD+N performance.
The traditional PWM scheme uses large differential out-
put swings (2 x V
) and causes large ripple cur-
DD(P-P)
rents. Any parasitic resistance in the filter components
results in a loss of power, lowering the efficiency.
The MAX9879 does not require an output filter. The
device relies on the inherent inductance of the speaker
coil and the natural filtering of both the speaker and the
human ear to recover the audio component of the
square-wave output. Eliminating the output filter results
in a smaller, less costly, more efficient solution.
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9879‘s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START (Sr) condition is
then sent followed by the slave address with the R/W
bit set to 1. The MAX9879 then transmits the contents
of the specified register. The address pointer autoincre-
ments after transmitting the first byte. The master
acknowledges receipt of each read byte during the
acknowledge clock pulse. The master must acknowl-
edge all correctly received bytes except the last byte.
The final byte must be followed by a not acknowledge
from the master and then a STOP (P) condition. Figure
11 illustrates the frame format for reading one byte from
the MAX9879. Figure 12 illustrates the frame format for
reading multiple bytes from the MAX9879.
Because the frequency of the MAX9879 output is well
beyond the bandwidth of most speakers, voice coil
movement due to the square-wave frequency is very
small. Although this movement is small, a speaker not
designed to handle the additional power can be dam-
aged. For optimum results, use a speaker with a series
inductance > 10µH. Typical 8Ω speakers exhibit series
inductances in the 20µH to 100µH range.
Component Selection
Optional Ferrite Bead Filter
In applications where speaker leads exceed 20mm,
additional EMI suppression can be achieved by using a
filter constructed from a ferrite bead and a capacitor to
ground. A ferrite bead with low DC resistance, high-
frequency (> 1.176MHz) impedance of 100Ω to 600Ω,
and rated for at least 1A should be used. The capacitor
value varies based on the ferrite bead chosen and the
Applications Information
Filterless Class D Operation
Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s output. The
Maxim Integrated
27
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