Ultra-Low Power Stereo Audio Codec
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
REF
= V
= 2.2µF, C
= V
MICBIAS
= +1.8V, R = ∞, headphone load (R ) connected between _OUTP and _OUTN in differential
AVDD
PVDD
DVDD
DVDDIO
= C
L
L
mode, C
= C
= 1µF, AV
= +20dB, AV
= 0dB, AV
= 0dB, AV
= +20dB, AV
=
PREG
REG
PRE
PGAM
DAC
LINE
VOL
0dB, MCLK = 13MHz, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL SIDETONE
Differential output mode,
DVST = 0x1F to 0x01
Sidetone Gain Adjust Range
Voice Path Phase Delay
AV
P
-60
0
dB
ms
STGA
MAX9867
MIC input to headphone output, f = 1kHz,
HP filter disabled, f = 8kHz
S
2.2
DLY
INPUT CLOCK CHARACTERISTICS
MCLK Input Frequency
f
For any LRCLK sample rate
Prescaler = /1 mode
/2 or /4 modes
10
40
30
60
60
70
MHz
%
MCLK
MCLK Input Duty Cycle
Maximum allowable RMS for performance
limits
Maximum MCLK Input Jitter
LRCLK Sample Rate Range
100
ps
RMS
8
48
7
kHz
Rapid lock mode
2
Any allowable LRCLK
LRCLK PLL Lock Time
and PCLK rate, slave
mode
ms
Nonrapid lock
mode
12
25
Allowable LRCLK period change from
nominal for slave PLL mode at any
allowable LRCLK and PCLK rates
LRCLK Acceptable Jitter for
Maintaining PLL Lock
100
ns
%
FREQ = 0x8 through 0xF
0
0
0
0
LRCLK Average Frequency Error
(Master and Slave Modes)
(Note 9)
PCLK = 192xf , 256xf , 384xf , 512xf ,
S
S
S
S
768xf , and 1024xf
S
S
All other modes
-0.025
+0.025
DIGITAL INPUT (MCLK)
Input High Voltage
V
1.2
V
V
IH
Input Low Voltage
V
0.6
1
IL
Input Leakage Current
Input Capacitance
I
, I
IH IL
T
A
= +25°C
µA
pF
10
DIGITAL INPUTS (SDIN, BCLK, LRCLK)
0.7 x
DVDDIO
Input High Voltage
Input Low Voltage
V
V
V
IH
0.3 x
DVDDIO
V
IL
Input Hysteresis
200
10
mV
µA
pF
Input Leakage Current
Input Capacitance
I
, I
IH IL
T
A
= +25°C
1
10 ______________________________________________________________________________________