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MAX7319ATE+ PDF预览

MAX7319ATE+

更新时间: 2024-01-11 00:48:40
品牌 Logo 应用领域
美信 - MAXIM 并行IO端口微控制器和处理器外围集成电路信息通信管理
页数 文件大小 规格书
16页 251K
描述
I2C Port Expander with Eight Inputs and Maskable Transition Detection

MAX7319ATE+ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:3 X 3 MM, 0.80 MM HEIGHT, MO-220C, TDFN-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.62
JESD-30 代码:S-XQCC-N16JESD-609代码:e0
长度:3 mm位数:1
I/O 线路数量:端口数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC16,.12SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):240电源:2/5 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:Parallel IO Port最大供电电压:5.5 V
最小供电电压:1.71 V标称供电电压:3.3 V
表面贴装:YES技术:BICMOS
温度等级:AUTOMOTIVE端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

MAX7319ATE+ 数据手册

 浏览型号MAX7319ATE+的Datasheet PDF文件第3页浏览型号MAX7319ATE+的Datasheet PDF文件第4页浏览型号MAX7319ATE+的Datasheet PDF文件第5页浏览型号MAX7319ATE+的Datasheet PDF文件第7页浏览型号MAX7319ATE+的Datasheet PDF文件第8页浏览型号MAX7319ATE+的Datasheet PDF文件第9页 
2
I C Port Expander with Eight Inputs and  
Maskable Transition Detection  
Table 1. MAX7319MAX7329 Family Comparison (continued)  
2
I C  
INPUT  
INTERRUPT  
MASK  
OPEN-  
DRAIN  
OUTPUTS OUTPUTS  
PUSH-  
PULL  
SLAVE  
ADDRESS  
PART  
INPUTS  
APPLICATION  
Four I/O, four output-only versions:  
Four open-drain I/O ports with latching transition  
detection interrupt and selectable pullups.  
Four push-pull outputs with selectable power-up  
default levels.  
PCF8574-, PCF8574A-compatible versions:  
Eight open-drain I/O ports with nonlatching transition  
detection interrupt and pullups on all ports.  
All ports power up as inputs (or logic-high outputs).  
Any port can be used as an input by setting the  
open-drain output to logic-high.  
MAX7323  
110xxxx  
Up to 4  
Up to 4  
Up to 8  
4
MAX7328  
MAX7329  
0100xxx  
0111xxx  
Up to 8  
16-PORT EXPANDERS  
MAX7324  
8
Yes  
8
8
Software equivalent to a MAX7320 plus a MAX7321.  
Software equivalent to a MAX7320 plus a MAX7319.  
Software equivalent to a MAX7320 plus a MAX7322.  
Software equivalent to a MAX7320 plus a MAX7323.  
101xxxx  
and  
110xxxx  
MAX7325  
Up to 8  
4
Up to 8  
MAX7326  
Yes  
12  
12  
MAX7327  
Up to 4  
Up to 4  
changes. An input change sets one of eight flag bits  
that identify changed input(s). All flags are cleared  
upon a subsequent read or write transaction to the  
MAX7319.  
Standby Mode  
When the serial interface is idle, the MAX7319 automat-  
ically enters standby mode, drawing minimal supply  
current.  
A latching interrupt output, INT, is programmed to flag  
input data changes on input ports through an interrupt  
mask register. By default, data changes on any input  
port force INT to a logic-low. The interrupt output, INT,  
and all transition flags are cleared when the MAX7319  
is next accessed through the serial interface.  
Slave Address and Input Pullup Selection  
Address inputs AD0 and AD2 determine the MAX7319  
slave address and select which inputs have pullup  
resistors. Pullups are enabled on the input ports in  
groups of four (see Table 3). The MAX7319, MAX7321,  
MAX7322, and MAX7323 use a different range of slave  
addresses (110xxxx) than the MAX7320 (101xxxx).  
Internal pullup resistors to V+ are selected by the  
address-select inputs, AD0 and AD2. Pullups are  
enabled on the input ports in groups of four (see Table 3).  
2
The MAX7319 slave address is determined on each I C  
transmission, regardless of whether the transmission is  
actually addressing the MAX7319. The MAX7319 distin-  
guishes whether address inputs AD2 and AD0 are con-  
nected to SDA or SCL instead of fixed logic levels V+  
or GND during this transmission. This means that the  
MAX7319 slave address can be configured dynamically  
in the application without cycling the device supply.  
Initial Power-Up  
On power-up, the transition detection logic is reset, and  
INT is released to a high-impedance state. The inter-  
rupt mask register is set to 0xFF, enabling the interrupt  
output for transitions on all eight input ports. The transi-  
tion flags are cleared to indicate no data changes.  
On initial power-up, the MAX7319 cannot decode the  
RST Input  
2
address inputs AD2 and AD0 fully until the first I C  
2
The RST input voids any I C transaction involving the  
transmission. AD0 and AD2 initially appear to be con-  
nected to V+ or GND. This is important because the  
address selection determines which inputs have  
2
MAX7319, forcing the MAX7319 into the I C STOP con-  
dition. A reset does not affect the interrupt output (INT)  
or change the contents of the interrupt mask register.  
RST is overvoltage tolerant to +6V.  
2
pullups applied. However, at power-up, the I C SDA  
and SCL bus interface lines are high impedance at the  
pins of every device (master or slave) connected to the  
bus, including the MAX7319. This is guaranteed as part  
6
_______________________________________________________________________________________  

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