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MAX6865UK45D2S-T PDF预览

MAX6865UK45D2S-T

更新时间: 2024-02-14 23:37:47
品牌 Logo 应用领域
美信 - MAXIM 信息通信管理光电二极管
页数 文件大小 规格书
17页 244K
描述
Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, PDSO5, MO-178AA, SOT-23, 5 PIN

MAX6865UK45D2S-T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:MO-178AA, SOT-23, 5 PIN针数:5
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G5JESD-609代码:e0
长度:2.9 mm信道数量:1
功能数量:1端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:TSOP5/6,.11,37封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:1.2/5.5 V认证状态:Not Qualified
座面最大高度:1.45 mm子类别:Power Management Circuits
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.625 mm
Base Number Matches:1

MAX6865UK45D2S-T 数据手册

 浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第4页浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第5页浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第6页浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第8页浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第9页浏览型号MAX6865UK45D2S-T的Datasheet PDF文件第10页 
Nanopower µP Supervisory Circuits with  
Manual Reset and Watchdog Timer  
MAX6861/MAX6862/MAX6863 Pin Description  
PIN  
NAME  
FUNCTION  
MAX6861/  
MAX6863  
MAX6862  
Reset Tiꢀeout Select Input. Connect CT low to select the D1 reset tiꢀeout output  
1
2
1
2
CT  
period (see Tables 1 and 4). Connect CT high (norꢀally V ) to select the D3  
CC  
reset tiꢀeout period.  
GND  
Ground  
Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output  
reꢀains asserted while MR is held low and for the reset tiꢀeout period after MR  
3
3
MR  
transitions high. Leave MR unconnected or connect to V  
if unused. MR is  
CC  
internally pulled up to V  
through 10k.  
CC  
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions froꢀ high to  
low when V drops below the selected reset threshold or MR is pulled low.  
CC  
4
RESET  
RESET reꢀains low for the reset tiꢀeout period after V  
exceeds the device  
CC  
reset threshold and MR deasserts. Push-pull RESET outputs are referenced to  
. Open-drain RESET outputs require an external pullup resistor.  
V
CC  
Supply Voltage. Input for V  
a 0.1µF capacitor to GND.  
reset ꢀonitor. For noisy systeꢀs, bypass V  
with  
CC  
CC  
5
5
4
V
CC  
Active-High Push-Pull Reset Output. RESET transitions froꢀ low to high when  
drops below the selected reset threshold or MR is pulled low. RESET  
V
CC  
RESET  
reꢀains high for the reset tiꢀeout period after V exceeds the device reset  
CC  
threshold and MR deasserts. RESET is referenced to V  
.
CC  
_______________________________________________________________________________________  
7

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