MAX6715A–MAX6729A/
MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 μP
Supervisory Circuits
Adjustable Input Voltage
Detailed Description
The MAX6719A/MAX6720A and MAX6723A–MAX6727A
provide an additional input to monitor a third system volt-
age. The threshold voltage at RSTIN is typically 626mV.
Connect a resistor-divider network to the circuit as shown
in Figure 1 to establish an externally controlled threshold
Supply Voltages
The MAX6715A–MAX6729A/MAX6797A μP supervisory
circuits maintain system integrity by alerting the μP to
fault conditions. These ICs are optimized for systems that
monitor two or three supply voltages. The outputreset
voltage, V
.
EXT_TH
state is guaranteed to remain valid while either V
or
CC1
V
CC2
is above 0.8V.
V
= 626mV((R1 + R2)/R2)
EXT_TH
Threshold Levels
Low-leakage current at RSTIN allows the use of largeval-
ued resistors resulting in reduced power consumption of
the system.
Input-voltage threshold level combinations are indicated
by a two-letter code in the Reset Voltage Threshold Suffix
Guide (Table 1). Contact factory for availability of other
voltage threshold combinations.
Watchdog Input
The watchdog monitors μP activity through the watchdog
input (WDI). To use the watchdog function, connect WDI
to a bus line or μP I/O line. When WDI remains high or
low for longer than the watchdog timeout period, the reset
output asserts.
Reset Outputs
The MAX6715A–MAX6729A/MAX6797A provide an
active-low reset output (RST) and the MAX6725A/
MAX6726A also provide an active-high (RST) output.
RST, RST, RST1, and RST2 are asserted when the
voltage at either V
threshold level, RSTIN drops below threshold, or MR is
pulled low. Once reset is asserted, it stays low for the
The MAX6721A–MAX6729A/MAX6797A include a dual-
mode watchdog timer to monitor μP activity. The flexible
timeout architecture provides a long period initial watch-
dog mode, allowing complicated systems to complete
lengthy boots, and a short period normal watchdog mode,
allowing the supervisor to provide quick alerts when pro-
or V
falls below the voltage
CC1
CC2
reset timeout period (see Table 2). If V
, V
, or
CC1
CC2
RSTIN goes below the reset threshold before the reset
timeout period is completed, the internal timer restarts.
The MAX6715A/MAX6717A/MAX6719A/MAX6721A/
MAX6723A/MAX6725A/MAX6727A/MAX6728A con-
tain open-drain reset outputs, while the MAX6716A/
MAX6718A/MAX6720A/MAX6722A/MAX6724A/
MAX6726A/MAX6729A/MAX6797A contain push-pull
reset outputs. The MAX6727A provides two separate
open-drain RST outputs driven by the same internal logic.
cessor activity fails. After each reset event (V
power-
CC
up/brownout, manual reset, or watchdog reset), there is
a long initial watchdog period of 35s minimum. The long
watchdog period mode provides an extended time for the
system to power-up and fully initialize all μP and system
components before assuming responsibility for routine
watchdog updates.
Manual-Reset Input
Many μP-based products require manual-reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. A logic-low on MR asserts the
reset output. Reset remains asserted while MR is low for
MAX6719A/
V
EXT_TH
MAX6720A/
MAX6723A–
MAX6727A
R1
R2
the reset timeout period (t ) after MR returns high. This
RP
input has an internal 50kΩ pullup resistor to V
and
CC1
RSTIN
can be left unconnected if not used. MR can be driven
with CMOS logic levels, or with open-drain/collector out-
puts. Connect a normally open momentary switch from
MR to GND to create a manualreset function; external
debounce circuitry is not required. If MR is driven from
long cables or if the device is used in a noisy environment,
connect a 0.1μF capacitor from MR to GND to provide
additional noise immunity.
GND
Figure 1. Monitoring a Third Voltage
Maxim Integrated
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www.maximintegrated.com
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