Datasheet > MAX6723AUTZGD5+T

MAX6723AUTZGD5+T

更新时间： 2022-12-01 21:08:20

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管
页数	文件大小	规格书
18页	1688K
描述
Power Supply Management Circuit, Adjustable, 3 Channel, BICMOS, PDSO6, LEAD FREE, MO-178AB, SOT-23, 6 PIN

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MAX6723AUTZGD5+T 数据手册

MAX6715A–MAX6729A/

MAX6797A

Dual/Triple, Ultra-Low-Voltage, SOT23 μP

Supervisory Circuits

Electrical Characteristics (continued)

= 0.8V to 5.5V, V

= 0.8V to 5.5V, GND = 0V, T = -40°C to +125°C, unless otherwise noted. Typical values are at T

CC1

CC2

+25°C.) (Note 1)

PARAMETER

SYMBOL

ΔV /°C

CONDITIONS

MIN

TYP

MAX

UNITS

ppm/°C

Reset Threshold Tempco

Reset Threshold Hysteresis

Referenced to V typical

0.5

HYST

= (V

+ 100mV) to (V

- 100mV) or

- 75mV)

CC1

CC2

TH1

TH2

TH1

to Reset Output Delay

µs

+ 75mV) to (V

TH2

1.1

8.8

1.65

13.2

26.25

52.5

210

2.2

17.6

D7 (MAX6797A only)

17.5

D8 (MAX6797A only)

Reset Timeout Period

140

280

560

1120

280

560

1120

2240

420

840

1680

ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A–MAX6727A)

RSTIN Input Threshold

RSTIN Input Current

611

626.5

642

µs

RSTIN

-100

+100

RSTIN

RSTIN Hysteresis

RSTIN to Reset Output Delay

to (V - 30mV)

RSTIN

RSTIND

RSTIN

POWER-FAIL INPUT (MAX6728A/MAX6729A)

PFI Input Threshold

PFI Input Current

PFI Hysteresis

611

626.5

642

µs

PFI

-100

+100

PFI

PFH

PFI to PFO Delay

+ 30mV) to (V - 30mV)

PFI

DPF

PFI

MANUAL-RESET INPUT (MAX6715A–MAX6722A/MAX6725A–MAX6729A)

0.3 x V

CC1

MR Input Voltage

0.7 x V

CC1

MR Minimum Pulse Width

MR Glitch Rejection

MR to Reset Delay

µs

kΩ

100

200

MR Pullup Resistance

WATCHDOG INPUT (MAX6721A–MAX6729A)

First watchdog period after reset timeout

period

Watchdog Timeout Period

Normal mode

(Note 2)

1.12

1.68

2.24

WDI Pulse Width

WDI Input Voltage

WDI Input Current

WDI

0.3 x V

0.7 x V

-1

CC1

= 0V or V

CC1

µA

WDI

Maxim Integrated

│

www.maximintegrated.com

1 234 5 6 7...18

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