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MAX6721UTSDD5 PDF预览

MAX6721UTSDD5

更新时间: 2024-01-03 07:39:38
品牌 Logo 应用领域
美信 - MAXIM 信息通信管理光电二极管
页数 文件大小 规格书
28页 334K
描述
Power Supply Management Circuit, Fixed, 2 Channel, BICMOS, PDSO6, MO-178AB, SOT-23, 6 PIN

MAX6721UTSDD5 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:MO-178AB, SOT-23, 6 PIN针数:6
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.54
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G6JESD-609代码:e0
长度:2.9 mm湿度敏感等级:1
信道数量:2功能数量:1
端子数量:6最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):245电源:1/5 V
认证状态:Not Qualified座面最大高度:1.45 mm
子类别:Power Management Circuits最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):0.8 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.625 mm

MAX6721UTSDD5 数据手册

 浏览型号MAX6721UTSDD5的Datasheet PDF文件第4页浏览型号MAX6721UTSDD5的Datasheet PDF文件第5页浏览型号MAX6721UTSDD5的Datasheet PDF文件第6页浏览型号MAX6721UTSDD5的Datasheet PDF文件第8页浏览型号MAX6721UTSDD5的Datasheet PDF文件第9页浏览型号MAX6721UTSDD5的Datasheet PDF文件第10页 
Single-/Dual-/Triple-Voltage µP Supervisory  
Circuits with Independent Watchdog Output  
Pin Description  
PIN  
NAME  
FUNCTION  
MAX6730  
MAX6731  
MAX6732  
MAX6733  
MAX6734  
MAX6735  
Active-Low Reset Output. The MAX6730/MAX6732/MAX6734 provide an open-  
drain output. The MAX6731/MAX6733/MAX6735 provide a push-pull output. RST  
1
2
1
2
1
2
RST asserts low when any of the following conditions occur: V 1 or V 2 drops below  
CC CC  
its preset threshold, RSTIN drops below its reset threshold, or MR is driven low.  
Open-drain versions require an external pullup resistor.  
GND Ground  
Active-Low Watchdog Output. The MAX6730/MAX6732/MAX6734 provide an open-  
drain WDO output. The MAX6731/MAX6733/MAX6735 provide a push-pull WDO  
output. WDO asserts low when no low-to-high or high-to-low transition occurs on  
3
3
4
WDO WDI within the watchdog timeout period (t ) or if an undervoltage lockout  
WD  
condition exists for V 1, V 2, or RSTIN. WDO deasserts without a timeout period  
CC  
CC  
when V 1, V 2, and RSTIN exceed their reset thresholds, or when the manual  
CC  
CC  
reset input is deasserted. Open-drain versions require an external pullup resistor.  
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains  
asserted as long as MR is low and for the reset timeout period after MR releases  
4
5
5
5
3
MR  
high. MR has a 50kpullup resistor to V 1; leave MR open or connect to V 1 if  
CC  
CC  
unused.  
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout  
period, the internal watchdog timer expires and the watchdog output asserts low.  
The internal watchdog timer clears whenever RST asserts or a rising or falling edge  
on WDI is detected. The watchdog has an initial watchdog timeout period (35s min)  
after each reset event and a short timeout period (1.12s min) after the first valid  
WDI transition. Floating WDI does not disable the watchdog timer function.  
WDI  
Primary Supply-Voltage Input. V 1 provides power to the device when it is greater  
CC  
6
6
4
8
6
V
1
CC  
than V 2. V 1 is the input to the primary reset threshold monitor.  
CC  
CC  
Secondary Supply-Voltage Input. V 2 provides power to the device when it is  
CC  
V
2
CC  
greater than V 1. V 2 is the input to the secondary reset threshold monitor.  
CC  
CC  
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance  
comparator input for the adjustable reset monitor. RST asserts low if the voltage at  
7
RSTIN RSTIN drops below the 626mV internal reference voltage. Connect a resistive  
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect RSTIN to  
V
1 or V 2 if unused.  
CC CC  
_______________________________________________________________________________________  
7

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