300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469/MAX6470/MAX6477/MAX6478 Pin Description
PIN
BUMP
NAME
FUNCTION
MAX6469/MAX6470
MAX6477/MAX6478
SOT23
TDFN
UCSP
1
1, 2
A1
IN
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
2
3
3
4
A2
A3
GND
SHDN Active-Low Shutdown Input. Connect SHDN to V for normal operation.
IN
Active-Low Reset Output. RESET remains low while V
is below the
OUT
reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
open-drain and push-pull configurations.
4
5
C3
RESET
Feedback Input for Externally Setting the Output Voltage. Connect SET
to GND to select the preset output voltage. Connect SET to an external
resistor-divider network for adjustable output operation.
5
6
6
C2
C1
—
SET
OUT
—
Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
7, 8
EP
Exposed Paddle. EP is internally connected to GND. Connect EP to the
ground plane to provide a low thermal-resistance path from the IC
junction to the PCB. Do not use as the electrical connection to GND.
—
MAX6471/MAX6472/MAX6479/MAX6480 Pin Description
PIN
MAX6475/MAX6476
BUMP
NAME
FUNCTION
MAX6483/MAX6484
SOT23
TDFN
UCSP
1
1, 2
A1
IN
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
2
3
3
4
A2
A3
GND
SHDN Active-Low Shutdown Input. Connect SHDN to V for normal operation.
IN
Active-Low Reset Output. RESET remains low while FB is below the
reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
4
5
C3
RESET
open-drain and push-pull configurations.
Feedback Input for Linear Regulator Controller or Remote Sense
Applications. Connect FB to the external load (V ) to obtain the fixed
CC
output voltage.
5
6
6
C2
C1
—
FB
OUT
—
Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
7, 8
EP
Exposed Paddle. EP is internally connected to GND. Connect EP to the
ground plane to provide a low thermal-resistance path from the IC
junction to the PCB. Do not use as the electrical connection to GND.
—
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