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MAX6472TA21BD4 PDF预览

MAX6472TA21BD4

更新时间： 2024-02-29 18:09:43
品牌 Logo 应用领域
美信 - MAXIM 稳压器微处理器复位电路
页数 文件大小 规格书
20页 563K
描述
300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit

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MAX6472TA21BD4 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SON
包装说明：3 X 3 MM, 0.80 MM HEIGHT, MO-229WEEC, TDFN-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.34
可调性：FIXED/ADJUSTABLE标称回动电压 1：0.4 V
最大绝对输入电压：7 VJESD-30 代码：S-XDSO-N8
JESD-609代码：e0长度：3 mm
湿度敏感等级：1功能数量：1
输出次数：1端子数量：8
工作温度TJ-Max：150 °C最高工作温度：85 °C
最低工作温度：-40 °C最大输出电流 1：0.3 A
最大输出电压 1：5 V最小输出电压 1：1.229 V
标称输出电压 1：2.1 V封装主体材料：UNSPECIFIED
封装代码：HVSON封装等效代码：SOLCC8,.12,25
封装形状：SQUARE封装形式：SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：245
认证状态：Not Qualified调节器类型：FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：0.8 mm子类别：Other Regulators
表面贴装：YES技术：BICMOS
端子面层：Tin/Lead (Sn/Pb)端子形式：NO LEAD
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大电压容差：2.7%
宽度：3 mmBase Number Matches：1

MAX6472TA21BD4 数据手册

 浏览型号MAX6472TA21BD4的Datasheet PDF文件第4页浏览型号MAX6472TA21BD4的Datasheet PDF文件第5页浏览型号MAX6472TA21BD4的Datasheet PDF文件第6页浏览型号MAX6472TA21BD4的Datasheet PDF文件第8页浏览型号MAX6472TA21BD4的Datasheet PDF文件第9页浏览型号MAX6472TA21BD4的Datasheet PDF文件第10页 
300mA LDO Linear Regulators with Internal  
Microprocessor Reset Circuit  
MAX6469/MAX6470/MAX6477/MAX6478 Pin Description  
PIN  
BUMP  
NAME  
FUNCTION  
MAX6469/MAX6470  
MAX6477/MAX6478  
SOT23  
QFN  
UCSP  
1
1, 2  
A1  
IN  
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.  
Ground. This pin also functions as a heatsink. Solder to large pads or  
the circuit-board ground plane to maximize thermal dissipation.  
2
3
3
4
A2  
A3  
GND  
Active-Low Shutdown Input. Connect SHDN to V for normal  
IN  
SHDN  
operation.  
Active-Low Reset Output. RESET remains low while V  
is below the  
OUT  
reset threshold. RESET remains low for the duration of the reset timeout  
period after the reset conditions are terminated. RESET is available in  
open-drain and push-pull configurations.  
4
5
C3  
RESET  
Feedback Input for Externally Setting the Output Voltage. Connect SET  
to GND to select the preset output voltage. Connect SET to an external  
resistor-divider network for adjustable output operation.  
5
6
6
C2  
C1  
SET  
Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR  
capacitor.  
7, 8  
OUT  
MAX6471/MAX6472/MAX6479/MAX6480 Pin Description  
PIN  
MAX6471/MAX6472  
BUMP  
NAME  
FUNCTION  
MAX6479/MAX6480  
SOT23  
QFN  
UCSP  
1
1, 2  
A1  
IN  
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.  
Ground. This pin also functions as a heatsink. Solder to large pads or  
the circuit-board ground plane to maximize thermal dissipation.  
2
3
3
4
A2  
A3  
GND  
Active-Low Manual Reset Input. The reset output is asserted while MR  
is pulled low and remains asserted for the duration of the reset timeout  
period after MR transitions from low to high. Leave MR unconnected or  
MR  
connect to V  
if not used. MR has an internal pullup resistor of 40kΩ  
OUT  
(typ) to V  
.
OUT  
Active-Low Reset Output. RESET remains low while V  
is below the  
OUT  
reset threshold or while MR is held low. RESET remains low for the  
4
5
C3  
RESET duration of the reset timeout period after the reset conditions are  
terminated. RESET is available in open-drain and push-pull  
configurations.  
Feedback Input for Externally Setting the Output Voltage. Connect SET  
5
6
6
C2  
C1  
SET  
to GND to select the preset output voltage. Connect SET to an external  
resistor-divider network for adjustable output operation.  
Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR  
capacitor.  
7, 8  
OUT  
_______________________________________________________________________________________  
7
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