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MAX3679A PDF预览

MAX3679A

更新时间: 2024-01-06 22:36:53
品牌 Logo 应用领域
美信 - MAXIM 晶体时钟发生器
页数 文件大小 规格书
11页 387K
描述
+3.3V, Low-Jitter Crystal to LVPECL Clock Generator

MAX3679A 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred包装说明:QCCN, LCC32,.2SQ,20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.52
JESD-30 代码:S-PQCC-N32JESD-609代码:e3
湿度敏感等级:1端子数量:32
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):225
电源:3.3 V认证状态:Not Qualified
子类别:Clock Generators最大压摆率:100 mA
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

MAX3679A 数据手册

 浏览型号MAX3679A的Datasheet PDF文件第5页浏览型号MAX3679A的Datasheet PDF文件第6页浏览型号MAX3679A的Datasheet PDF文件第7页浏览型号MAX3679A的Datasheet PDF文件第9页浏览型号MAX3679A的Datasheet PDF文件第10页浏览型号MAX3679A的Datasheet PDF文件第11页 
+3.3V, Low-Jitter Crystal to LVPECL  
Clock Generator  
Table 1. Output Frequency Determination  
XO OR CMOS  
VCO  
FREQUENCY  
(MHz)  
OUTPUT  
DIVIDER,  
NA AND NB  
OUTPUT  
FREQUENCY  
(MHz)  
FEEDBACK  
DIVIDER, M  
INPUT  
FREQUENCY  
(MHz)  
APPLICATIONS  
÷2  
÷4  
312.5  
156.25  
125  
25  
25  
625  
Ethernet  
÷5  
MX3679A  
÷10  
62.5  
Table 2. Output Divider Configuration  
Table 3. Crystal Selection Parameters  
PARAMETER  
SYMBOL MIN TYP MAX UNITS  
INPUT  
NA/NB DIVIDER  
Crystal Oscillation  
Frequency  
SELA1/SELB1  
SELA0/SELB0  
f
25  
MHz  
OSC  
0
1
1
0
0
÷2*  
÷4  
Shunt Capacitance  
Load Capacitance  
C
2.0  
18  
7.0  
pF  
pF  
O
0
1
C
L
÷5  
Equivalent Series  
Resistance (ESR)  
OPEN  
÷10  
R
50  
S
*Maximum guaranteed output frequency is 160MHz for CMOS  
and 320MHz for LVPECL output.  
Maximum Crystal  
Drive Level  
300  
μW  
27pF  
X_IN  
25MHz CRYSTAL  
(C = 18pF)  
L
X_OUT  
33pF  
Figure 4. Crystal, Capacitors Connection  
Crystal Input Layout and  
Frequency Stability  
The crystal, trace, and two external capacitors should  
be placed on the board as close as possible to the  
MAX3679A’s X_IN and X_OUT pins to reduce crosstalk  
of active signals into the oscillator.  
Figure 3. Crystal Layout  
The layout shown in Figure 3 gives approximately 3pF  
of trace plus footprint capacitors per side of the crystal  
(Y1). The dielectric material is FR4 and dielectric thick-  
ness of the reference board is 15 mils. Using a 25MHz  
crystal and the capacitor values of C22 = 27pF and  
C23 = 33pF, the measured output frequency accuracy  
is -14ppm at +25°C ambient temperature.  
Crystal Selection  
The crystal oscillator is designed to drive a fundamental  
mode, AT-cut crystal resonator. See Table 3 for recom-  
mended crystal specifications. See Figure 4 for external  
capacitance connection.  
8
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