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MAX2118UTL

更新时间： 2024-02-17 10:59:35
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
15页 315K
描述
Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs

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中文翻译

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MAX2118UTL 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：6 X 6 MM, LEAD FREE, QFN-40
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.78
特性阻抗：30 Ω构造：COMPONENT
JESD-609代码：e3LO 可调谐：YES
安装特点：SURFACE MOUNT端子数量：40
最高工作温度：85 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装等效代码：LCC40,.24SQ,20
电源：5 V最大射频输入频率：2175 MHz
最小射频输入频率：925 MHz射频/微波设备类型：DOWN CONVERTER
子类别：RF/Microwave Up/Down Converters最大压摆率：265 mA
表面贴装：YES端子面层：Matte Tin (Sn)

MAX2118UTL 数据手册

 浏览型号MAX2118UTL的Datasheet PDF文件第6页浏览型号MAX2118UTL的Datasheet PDF文件第7页浏览型号MAX2118UTL的Datasheet PDF文件第8页浏览型号MAX2118UTL的Datasheet PDF文件第10页浏览型号MAX2118UTL的Datasheet PDF文件第11页浏览型号MAX2118UTL的Datasheet PDF文件第12页 
Complete DBS Direct-Conversion Tuner ICs  
with Monolithic VCOs  
Pin Description  
PIN  
NAME  
FUNCTION  
I-Channel Baseband DC Offset Correction. Connect a 0.1µF ceramic chip capacitor from IDC-  
to IDC+.  
1, 2  
IDC-, IDC+  
DC Power Supply for LNA and First-Stage RF VGA. Connect to a 5V 5ꢀ low-noise supply.  
Bypass with a 1nF capacitor directly to GND. Do not share vias.  
3
4
5
VCCRF1  
RFIN-  
75Ω RF-Inverting Input. Working in conjunction with RFIN+ for differential input. Terminate with  
22pF capacitor in series with a 75Ω resistor to GND for single-ended input.  
75Ω RF Noninverting Input. Working in conjunction with RFIN- for differential input. Connect to  
source through a 22pF series capacitor.  
RFIN+  
6, 9, 11, 25,  
31  
N.C.  
No Connection. Pin should be connected directly to GND.  
Gain Control Input for RF Front End. High-impedance analog input with an operating range of  
0.75V to 2.6V. VGC1 = 0.75V corresponds to maximum gain.  
7
8, 28  
10  
GC1  
2.85V Linear Regulator. Used for terminating open-drain interfaces from demodulator. Each  
regulator can source 3mA.  
VREG1, VREG2  
PAD  
Ground. Direct connection to exposed pad. Can be used to check exposed pad continuity to  
ground.  
DC Power Supply for LO Circuits. Connect to a 5V 5ꢀ low-noise supply. Bypass with a 1nF  
capacitor directly to GND. Do not share vias.  
12  
VCCLO  
DC Power Supply for VCO Circuits. Connect to a 5V 5ꢀ low-noise supply. See the  
Applications Information section for more details.  
13  
14  
VCCVCO  
LOFLT  
LO Internal Regulator Bypass. Bypass with a 0.22µF ceramic chip capacitor to GND.  
2
I C Address Select Control. See Table 1 and Table 2. These pins are internally pullup  
to V . For logic high, leave these pins open.  
CC  
15, 26, 32  
AS2, AS1, AS0  
16  
17  
18  
VTUNE  
CPOUT  
IFLT  
High Impedance VCO Tune Input  
Charge-Pump Output  
Test Pin. For normal operation, connect IFLT to ground.  
DC Power Supply for Charge Pump and XTAL Oscillator Circuits. Connect to a 5V 5ꢀ low-  
noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias.  
19  
20  
VCCCPX  
CFLT  
Bypass for Internal Crystal Oscillator Bias. Bypass with a 0.22uF ceramic chip capacitor to  
GND.  
21, 22  
23  
XTL+, XTAL-  
CNTOUT  
Crystal Oscillator Interface. See Typical Operating Circuit.  
Test Pin. Must be left open.  
24  
XTALOUT  
SDA, SCL  
Crystal Oscillator Buffer Output. Requires a 10nF DC-blocking capacitor.  
I2C Data and Clock Interface. See the Applications Information section for details.  
27, 29  
DC Power Supply for Digital Circuits. Connect to a 5V 5ꢀ low-noise supply. Bypass with a 1nF  
capacitor directly to GND. Do not share vias.  
30  
33  
VCCDIG  
N.C. (MAX2116) No Connection. Pin should be connected directly to GND.  
QOUT- (MAX2118) Inverting Baseband Quadrature Output  
_______________________________________________________________________________________  
9
1...6789101112...15

中文翻译

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