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MAX1609EEE+T

更新时间: 2024-01-26 07:16:16
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
16页 292K
描述
Parallel I/O Port, 8 I/O, CMOS, PDSO16, 0.150 INCH, 0.635 MM PITCH, QSOP-16

MAX1609EEE+T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:0.150 INCH, 0.025 INCH PITCH, MO-137D, QSOP-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.38
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:4.9 mm湿度敏感等级:1
I/O 线路数量:8端口数量:0
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, SHRINK PITCH峰值回流温度(摄氏度):245
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压:5.5 V最小供电电压:2.7 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

MAX1609EEE+T 数据手册

 浏览型号MAX1609EEE+T的Datasheet PDF文件第7页浏览型号MAX1609EEE+T的Datasheet PDF文件第8页浏览型号MAX1609EEE+T的Datasheet PDF文件第9页浏览型号MAX1609EEE+T的Datasheet PDF文件第11页浏览型号MAX1609EEE+T的Datasheet PDF文件第12页浏览型号MAX1609EEE+T的Datasheet PDF文件第13页 
Octal SMBus-to-Parallel I/O Expanders  
configurations asynchronously, eliminating latencies  
introduced by the serial bus.  
LAST BIT  
CLOCKED  
ACKNOWLEDGE  
BIT CLOCKED  
INTO MASTER  
ALERT  
INTO SLAVE**  
The MAX1608/MAX1609 can generate hardware inter-  
rupts whenever the logic states of the IO_ pins change  
or when thermal shutdown occurs. Interrupts are sig-  
naled on the ALERT pin. The IO_ interrupts can be  
masked individually through the mask registers.  
Registers NDR2 and SDR2 mask the IO_ rising-edge  
interrupts, while NDR3 and SDR3 mask the IO_ falling-  
edge interrupts. The power-on-reset state masks all  
interrupts (Tables 4 and 5).  
SCL  
SDA  
SLAVE PULLING  
SDA LOW  
t
t
DH:DAT  
DH:DAT  
STOP  
The thermal-shutdown protection also generates an  
interrupt. This interrupt cannot be masked (see Thermal  
Shutdown section). An interrupt can be cleared with a  
SPOR or an Alert Response. However, after an interrupt  
has occurred, masking will not clear it.  
REGISTERS  
UPDATED*  
IO_TRANSITION  
Alert Response Address (0b00011001)  
The alert response (interrupt pointer) address provides  
quick fault identification for simple slave devices that  
cannot initiate communication as a bus master. When a  
slave device generates an interrupt, the host (bus mas-  
ter) interrogates the bus slave devices through a special  
receive-byte operation that includes the alert response  
address (0x19). The offending slave device returns its  
own address during this receive-byte operation.  
IO_  
t
SCL:IO  
*NDR#, SDR# ARE LOADED. RAP, SPOR ARE INITIATED. RSB IS SAMPLED.  
**DURING A RECEIVE-BYTE PROTOCOL, CORRESPONDS TO THE R/W BIT. DURING A  
READ/WRITE-BYTE PROTOCOL, CORRESPONDS TO LAST BIT OF DATA.  
The interrupt pointer address can activate several dif-  
ferent slave devices simultaneously. If more than one  
Figure 5. Registers/IO_ Update Timing Diagram  
Table 2. Command-Byte/Register Assignment  
POR STATE  
REGISTER  
COMMAND  
FUNCTION  
MAX1608  
0000 0000  
1111 1111  
1111 1111  
0000 0000  
1111 1111  
1111 1111  
MAX1609  
NDR1  
NDR2  
NDR3  
SDR1  
SDR2  
SDR3  
RSB  
00h  
01h  
02h  
03h  
04h  
05h  
06h  
07h  
08h  
FEh  
1111 1111  
1111 1111  
1111 1111  
1111 1111  
1111 1111  
1111 1111  
Normal Data Register 1. Sets the IO_ states.  
Normal Data Register 2. Masks the L/H interrupt.  
Normal Data Register 3. Masks the H/L interrupt.  
Suspend Data Register 1. Sets the IO_ states.  
Suspend Data Register 2. Masks the L/H interrupt.  
Suspend Data Register 3. Masks the H/L interrupt.  
IO_ Status Data Register. Read pin state.  
RAP  
Sample the address pins.  
SPOR  
MFID  
Execute software POR and samples address pins.  
Read manufacturer ID (ASCII code for "M"axim).  
4Dh  
4Dh  
10 ______________________________________________________________________________________  

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