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M95256-WBN1 PDF预览

M95256-WBN1

更新时间: 2024-11-19 21:04:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
21页 174K
描述
32KX8 SPI BUS SERIAL EEPROM, PDIP8, 0.25 MM LEAD FRAME, SKINNY, PLASTIC, DIP-8

M95256-WBN1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.25 MM LEAD FRAME, SKINNY, PLASTIC, DIP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.69其他特性:100000 ERASE/WRITE CYCLES; 40 YEARS DATA RETENTION
最大时钟频率 (fCLK):2 MHz数据保留时间-最小值:40
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.55 mm
内存密度:262144 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:8字数:32768 words
字数代码:32000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL电源:3/5 V
认证状态:Not Qualified座面最大高度:5.9 mm
串行总线类型:SPI子类别:EEPROMs
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mm最长写入周期时间 (tWC):10 ms
写保护:HARDWARE/SOFTWAREBase Number Matches:1

M95256-WBN1 数据手册

 浏览型号M95256-WBN1的Datasheet PDF文件第2页浏览型号M95256-WBN1的Datasheet PDF文件第3页浏览型号M95256-WBN1的Datasheet PDF文件第4页浏览型号M95256-WBN1的Datasheet PDF文件第5页浏览型号M95256-WBN1的Datasheet PDF文件第6页浏览型号M95256-WBN1的Datasheet PDF文件第7页 
M95256  
M95128  
256/128 Kbit Serial SPI Bus EEPROM  
With High Speed Clock  
PRELIMINARY DATA  
SPI Bus Compatible Serial Interface  
Supports Positive Clock SPI Modes  
5 MHz Clock Rate (maximum)  
Single Supply Voltage:  
14  
8
– 4.5V to 5.5V for M95xxx  
– 2.7V to 3.6V for M95xxx-V  
– 2.5V to 5.5V for M95xxx-W  
– 1.8V to 3.6V for M95xxx-R  
Status Register  
1
1
PSDIP8 (BN)  
0.25 mm frame  
TSSOP14 (DL)  
169 mil width  
Hardware and Software Protection of the Status  
Register  
8
8
BYTE and PAGE WRITE (up to 64 Bytes)  
Self-Timed Programming Cycle  
1
1
Resizeable Read-Only EEPROM Area  
Enhanced ESD Protection  
SO8 (MN)  
SO8 (MW)  
150 mil width  
200 mil width  
100,000 Erase/Write Cycles (minimum)  
40 Year Data Retention (minimum)  
DESCRIPTION  
These SPI-compatible electrically erasable  
programmable memory (EEPROM) devices are  
organized as 32K x 8 bits (M95256) and 16K x 8  
bits (M95128), and operate down to 2.7 V (for the  
Figure 1. Logic Diagram  
V
CC  
Table 1. Signal Names  
D
C
S
Q
C
Serial Clock  
Serial Data Input  
Serial Data Output  
Chip Select  
Write Protect  
Hold  
D
M95xxx  
Q
W
S
HOLD  
W
HOLD  
V
SS  
V
Supply Voltage  
Ground  
CC  
AI01789C  
V
SS  
March 2000  
1/21  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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