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M95256-D-WDW6TG/K PDF预览

M95256-D-WDW6TG/K

更新时间: 2022-03-04 06:06:17
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
48页 500K
描述
256 Kbit serial SPI bus EEPROM with high-speed clock

M95256-D-WDW6TG/K 数据手册

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Description  
M95256-DR, M95256, M95256-W, M95256-R  
1
Description  
The M95256, M95256-W, M95256-R and M95256-DR are electrically erasable  
programmable memory (EEPROM) devices. They are accessed by a high speed SPI-  
compatible bus. Their memory array is organized as 32768 × 8 bits.  
The M95256-DR also offers an additional page, named the Identification Page (64 bytes)  
which can be written and (later) permanently locked in Read-only mode. This Identification  
Page offers flexibility in the application board production line, as the Identification Page can  
be used to store unique identification parameters and/or parameters specific to the  
production line.  
The device is accessed by a simple serial interface that is SPI-compatible.  
Figure 1.  
Logic diagram  
V
CC  
D
C
S
Q
M95256  
W
HOLD  
V
SS  
AI12361  
The bus signals are C, D and Q, as shown in Table 1 and Figure 1.  
The device is selected when Chip Select (S) is taken low. Communications with the device  
can be interrupted using Hold (HOLD).  
Figure 2.  
8-pin package connections  
M95256  
S
Q
1
8
V
CC  
HOLD  
2
3
4
7
6
5
W
C
D
V
SS  
AI12362  
1. See Section 10: Package mechanical data for package dimensions, and how to identify pin-1.  
Caution:  
As EEPROM cells loose their charge (and so their binary value) when exposed to ultra violet  
(UV) light, EEPROM dice delivered in wafer form or in WLCSP package by  
ST Microelectronics must never be exposed to UV light.  
6/48  
Doc ID 12276 Rev 11  

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