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M74HCT174RM13TR PDF预览

M74HCT174RM13TR

更新时间: 2024-11-19 03:02:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
10页 244K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

M74HCT174RM13TR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:7.65
系列:HCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大I(ol):0.004 A湿度敏感等级:1
位数:6功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):35 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:24 MHz
Base Number Matches:1

M74HCT174RM13TR 数据手册

 浏览型号M74HCT174RM13TR的Datasheet PDF文件第2页浏览型号M74HCT174RM13TR的Datasheet PDF文件第3页浏览型号M74HCT174RM13TR的Datasheet PDF文件第4页浏览型号M74HCT174RM13TR的Datasheet PDF文件第5页浏览型号M74HCT174RM13TR的Datasheet PDF文件第6页浏览型号M74HCT174RM13TR的Datasheet PDF文件第7页 
M74HCT174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED :  
= 56MHz (TYP.) at V = 4.5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
=4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
T & R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 174  
DIP  
SOP  
M74HCT174B1R  
M74HCT174M1R M74HCT174RM13TR  
M74HCT174TTR  
TSSOP  
DESCRIPTION  
The M74HCT174 is an high speed CMOS HEX  
D-TYPE FLIP FLOP WITH CLEAR fabricated with  
silicon gate C MOS technology.  
(CLR) input is held low, the Q outputs are held low  
independently of the other inputs.  
2
Information signals applied to D inputs are  
transferred to the Q output on the positive going  
edge of the CLOCK (CK) pulse. When the CLEAR  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/10  

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