MITSUBISHI ICs (TV)
M64897GP
PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M64897GP is a semiconductor integrated circuit consisting of
PLL frequency synthesizer for TV/VCR/PC using I2C BUS control.
It contains the prescaler with operating up to1.3GHz, 4 band drivers
and DC-DC converter for Tuning voltage.
PRESCALER
INPUT
CRYSTAL
1
2
20 Xin
fin
GND
VCC1
VCC2
BS4
BS3
BS2
BS1
VDC
OSCILLATOR
CHIP ADDRESS
INPUT
19 ADS
GND
SUPPLY
3
18
17
16
SDA
DATA INPUT
VOLTAGE 1
SUPPLY
4
SCL
CLOCK INPUT
VOLTAGE 2
FEATURES
LD/ftest
OUTPUT
A/D INPUT
5
LD/ftest
• Built-in DC-DC converter for Tuning voltage
BAND
SWITCHING
OUTPUTS
6
15 ADC
14 Vin
• 4 integrated PNP band drivers
FILTER INPUT
7
(Io=30mA, Vsat=0.2V typ@Vcc1 to 10V)
TUNING
OUTPUT
SUPPLY
VOLTAGE
SWITCHING
OUTPUT
• Built-in prescaler with input amplifier (f max=1.3GHz)
8
13
Vtu
12 +B
11
• PLL lock/unlock status display out put
DC-DCSUPPLY
VOLTAGE
9
(Built-in pull up resistor)
PEACK CURRENT
DETECT
10
Ipk
SWE
• X’tal 4MHz is used to realize 3 type of tuning steps
(Divider ratio 1/512, 1/640, 1/1024)
Outline 20P2E-A
• Software compatible with M64894
• Built-in Power on reset system
• Small Package (SSOP)
RECOMMENDED OPERATING CONDITION
Supply voltage range..............................................VCC1=4.5 to 5.5V
VCC2=VCC1 to 10V
APPLICATION
PC, TV, VCR tuners
Rated supply voltage...........................................................VCC1=5V
VCC2=VCC1
BLOCK DIAGRAM
VCC1
3
VDC
9
Ipk
10
S
R
Q
20
1
OSC
AMP
f REF DIVIDER
SELECTER
LATCH
DIV.
Xin
fin
11
SWE
2
1/8
-
15
Vreg
LATCH
+
12
13
+B
Vtu
15bit
PHASE
DETECTOR
CHARGE
PUMP
1/32,1/33
PROGRAMMABLE DIVIDER
OS
CP
TEST
LATCH
17
18
19
SCL
SDA
ADS
14
16
Vin
1
LOCK
DETECTOR
BUS CONTROLLER
ADDRESS SELECT
5
3
5-LEVEL A/D
LD/ftest
4
1
BAIS / BAND SWITCH DRIVER
Power
On Reset
4
5
6
7
8
2
15
VCC2
BS4
BS3
BS2
BS1
GND
ADC
1