Datasheet > M54HCT139

M54HCT139

更新时间： 2024-09-26 22:57:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		解码器解复用器
页数	文件大小	规格书
9页	241K
描述
DUAL 2 TO 4 DECODER/DEMULTIPLEXER

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中文翻译

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数据手册

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M54HCT139 数据手册

M54HCT139

M74HCT139

DUAL 2 TO 4 DECODER/DEMULTIPLEXER

HIGH SPEED

t_PD= 17 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

COMPATIBLE WITH TTL OUTPUTS

V_IH= 2V (MIN.) V_IL= 0.8V (MAX)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

PIN AND FUNCTION COMPATIBLE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

WITH 54/74LS139

ORDER CODES :

DESCRIPTION

M54HCT139F1R

M74HCT139M1R

M74HCT139B1R

M74HCT139C1R

The M54/74HCT139 is a high speed CMOS DUAL

TWO LINE TO FOUR LINE DECODER/DEMULTI-

PLEXER fabricated in silicon gate C2MOS technol-

ogy. It has the same high speed performance of

LSTTL combined with true CMOS low power con-

sumption. The activelow enable input can beused for

gating or as a data input for demultiplexing applica-

tions. While theenable input is held high, all four out-

puts are high independently of the other inputs. All

inputs are equipped with protection circuits against

staticdischarge and transient excessvolt-age.This in-

tegrated circuit has input and output characteristics

that are fully compatible with 54/74 LSTTL logic

families. M54/74HCT devices are designed to directly

interface HSC²MOS systems with TTL and NMOS

components. They are also plug in replacements for

PIN CONNECTIONS (top view)

INPUT AND OUTPUT EQUIVALENT CIRCUIT

NC =

No Internal

Connection

February 1993

1/9

12 3 4 5 6 7...9

中文翻译

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