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M27C256B-80B6X

更新时间： 2024-01-05 15:58:24
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
16页 149K
描述
256 Kbit (32Kb x 8) UV EPROM and OTP EPROM

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M27C256B-80B6X 数据手册

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M27C256B  
(1)  
Table 8B. Read Mode AC Characteristics  
(T = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; V = 5V ± 5% or 5V ± 10%; V = V  
)
A
CC  
PP  
CC  
M27C256B  
-10 -12  
Min Max Min Max Min Max Min Max  
Symbol  
Alt  
Parameter  
Test Condition  
-90  
-15/-20/-25 Unit  
Address Valid to  
Output Valid  
t
t
E = V , G = V  
90  
90  
40  
30  
30  
100  
100  
50  
120  
120  
60  
150  
150  
65  
ns  
ns  
ns  
ns  
ns  
ns  
AVQV  
ACC  
IL  
IL  
Chip Enable Low to  
Output Valid  
t
t
G = V  
ELQV  
CE  
IL  
IL  
IL  
IL  
Output Enable Low to  
Output Valid  
t
t
E = V  
G = V  
E = V  
GLQV  
OE  
Chip Enable High to  
Output Hi-Z  
(2)  
t
0
0
0
0
0
0
30  
0
0
0
40  
0
0
0
50  
t
DF  
EHQZ  
Output Enable High  
to Output Hi-Z  
(2)  
t
30  
40  
50  
t
DF  
GHQZ  
Address Transition to  
Output Transition  
t
t
E = V , G = V  
IL IL  
AXQX  
OH  
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .  
PP  
CC  
PP  
2. Sampled only, not 100% tested.  
Figure 5. Read Mode AC Waveforms  
VALID  
tGLQV  
VALID  
A0-A14  
tAVQV  
tAXQX  
E
tEHQZ  
tGHQZ  
G
tELQV  
Hi-Z  
Q0-Q7  
AI00758B  
System Considerations  
The power switching characteristics of Advance  
CMOS EPROMs require careful decoupling of the  
output control and by properly selected decoupling  
capacitors. It is recommended that a 0.1µF ceram-  
ic capacitor be used on every device between V  
CC  
devices. The supply current, I , has three seg-  
and V . This should be a high frequency capaci-  
CC  
SS  
ments that are of interest to the system designer:  
the standby current level, the active current level,  
and transient current peaks that are produced by  
the falling and rising edges of E. The magnitude of  
this transient current peaks is dependent on the  
capacitive and inductive loading of the device at  
the output. The associated transient voltage peaks  
can be suppressed by complying with the two line  
tor of low inherent inductance and should be  
placed as close to the device as possible. In addi-  
tion, a 4.7µF bulk electrolytic capacitor should be  
used between V and V for every eight devic-  
CC  
SS  
es. The bulk capacitor should be located near the  
power supply connection point. The purpose of the  
bulk capacitor is to overcome the voltage drop  
caused by the inductive effects of PCB traces.  
6/16  
1...3456789...16

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