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M1415-PL84C PDF预览

M1415-PL84C

更新时间: 2024-09-25 14:43:15
品牌 Logo 应用领域
ACTEL 时钟可编程逻辑
页数 文件大小 规格书
20页 105K
描述
Field Programmable Gate Array, 1500 Gates, 125MHz, CMOS, PQCC84, PLASTIC, LCC-84

M1415-PL84C 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:PLASTIC, LCC-84Reach Compliance Code:compliant
风险等级:5.92Is Samacsys:N
其他特性:MAX 70 I/OS; MASK BASED最大时钟频率:125 MHz
CLB-Max的组合延迟:1.5 nsJESD-30 代码:S-PQCC-J84
JESD-609代码:e0长度:29.3116 mm
湿度敏感等级:3等效关口数量:1500
端子数量:84最高工作温度:70 °C
最低工作温度:组织:1500 GATES
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):225可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:29.3116 mm
Base Number Matches:1

M1415-PL84C 数据手册

 浏览型号M1415-PL84C的Datasheet PDF文件第2页浏览型号M1415-PL84C的Datasheet PDF文件第3页浏览型号M1415-PL84C的Datasheet PDF文件第4页浏览型号M1415-PL84C的Datasheet PDF文件第5页浏览型号M1415-PL84C的Datasheet PDF文件第6页浏览型号M1415-PL84C的Datasheet PDF文件第7页 
Actel  
Mask Programmed Gate Arrays  
F e a t u r e s  
Available in commercial or industrial temperature ranges  
• PLCC, PQFP, VQFP, and TQFP packages available  
Mask Programmed versions of Actel Field Programmable  
Gate Arrays (FPGAs)  
Meets all internal worst-case FPGA performance  
specifications  
• Significant cost reduction for medium- to high-volume  
applications  
Lower I/O capacitance than FPGA  
Lower power dissipation than FPGA  
• Pin-for-pin compatible with Actel FPGAs  
• PCI Local Bus Revision 2 Compliant  
D e s c r i p t i o n  
Automatic translation from Actel FPGA netlist to MPGA  
Test vectors generated from customer simulation vectors  
• Short lead times for prototype and production devices  
The Actel Mask Programmed Gate Array (MPGA) products  
are masked versions of the popular Actel FPGA families.  
These semi-custom devices offer the customer a design path  
that provides significant cost reduction without significant  
risk or engineering effort. For medium- to high-volume  
applications in which the design is fixed, the Actel FPGA used  
for prototyping and initial production can be replaced by the  
corresponding MPGA device.  
MPGA available for all ACT 1, ACT 2, 1200XL, ACT 3, and  
3200DX devices  
Device sizes from 1,200 to 10,000 gates  
Up to 175 user I/Os  
P r o d u c t F a m i l y P r o f i l e  
Capacity  
Available Packages  
MPGA  
Device  
Type  
Gate Array  
Equivalent  
Gates  
PLD  
Equivalent  
Gates  
Flip-Flops  
User I/Os  
(Maximum) (Maximum)  
PLCC  
PQFP  
VQFP  
TQFP  
M1010  
M1020  
1,200  
2,000  
3,000  
6,000  
147  
273  
57  
69  
44, 68-pin  
100-pin  
100-pin  
80-pin  
80-pin  
44, 68,  
84-pin  
M1225  
M1240  
M1280  
2,500  
4,000  
8,000  
6,250  
10,000  
20,000  
382  
568  
998  
83  
104  
140  
84-pin  
84-pin  
84-pin  
100-pin  
100-pin  
100, 144-pin  
176-pin  
176-pin  
100, 160,  
208-pin  
M1415  
M1425  
1,500  
2,500  
3,750  
6,250  
312  
435  
80  
100  
140  
167  
175  
126  
152  
176  
202  
250  
288  
84-pin  
84-pin  
84-pin  
100-pin  
100, 160-pin  
160-pin  
100-pin  
100-pin  
100-pin  
M1440  
4,000  
10,000  
15,000  
25,000  
1,600  
706  
176-pin  
176-pin  
M1460  
6,000  
976  
160, 208-pin  
208-pin  
M14100  
M3265  
10,000  
6,500  
1153  
747  
84-pin  
84-pin  
84-pin  
100, 160-pin  
160, 208-pin  
160, 208-pin  
208, 240-pin  
208, 240-pin  
240-pin  
176-pin  
176-pin  
176-pin  
M32100  
M32140  
M32200  
M32300  
M32400  
10,000  
14,000  
20,000  
30,000  
40,000  
25,000  
35,000  
50,000  
75,000  
100,000  
1031  
1410  
1822  
2804  
3759  
S e p t e m b e r 1 9 9 7  
1 -3 8 9  
© 1997 Actel Corporation  

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