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LXT901/LXT907 PDF预览

LXT901/LXT907

更新时间: 2022-01-18 23:21:00
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页数 文件大小 规格书
10页 80K
描述
LXT901. LXT907 - Design Guide for LXT901/907 Ethernet Interface Connection to Motorola MC68EN360 Controller

LXT901/LXT907 数据手册

 浏览型号LXT901/LXT907的Datasheet PDF文件第4页浏览型号LXT901/LXT907的Datasheet PDF文件第5页浏览型号LXT901/LXT907的Datasheet PDF文件第6页浏览型号LXT901/LXT907的Datasheet PDF文件第8页浏览型号LXT901/LXT907的Datasheet PDF文件第9页浏览型号LXT901/LXT907的Datasheet PDF文件第10页 
Design Guide for LXT901/907 Ethernet Interface  
2.0  
LXT90x / QUICC Interface  
The LXT901 is available in either a 44-pin PLCC or a 64-pin TQFP package. The LXT907 is  
available in a 44-pin PLCC package. The PLCC package is pin compatible for both devices except  
for pin 37. This pin is STP (unshielded/shielded twisted-pair select) on the LXT901 and DSQE  
(Disable SQE) on the LXT907 device.  
The following pins on the LXT901 or LXT907 device connect to the MC68EN360 SCC1 signals  
as shown in Table 1.  
Table 1. Pin Connections  
LXT901/LXT907 Device  
Motorola QUICC  
MC68EN360  
SCC1 Signal  
PLCC  
Pin  
TQFP  
Pin  
Signal  
RCLK  
1
28  
11  
12  
26  
13  
27  
16  
22  
40  
17  
4
47  
CLK1-4  
1
23  
24  
45  
25  
46  
28  
38  
3
TCLK  
TXD  
CLK1-4  
TXD  
RXD  
TEN  
RXD  
2
RTS  
2
CD  
CD  
2
COL  
CTS  
LBK  
PAUI  
AUTOSEL  
NTH  
Connect these bits to  
the Parallel I/O bus on  
the QUICC and  
29  
13  
59  
n/a  
3
program as needed.  
37 (901)  
37 (907)  
STP  
DSQE  
1. The design must provide separate clocks for TCLK and  
RCLK. Any of the clocks on the QUICC will do.  
2. These signals are active high in this application.  
3. Please check the Motorola specification for the connections  
needed for the desired result.  
2.1  
Setting QUICC Parameters  
Refer to the Motorola MC68360 Quad Integrated Communications Controller Users Manual for  
the QUICC function settings. The following considerations should be reviewed for an optimized  
design:  
Bypass both the Digital Phase-Locked Loop (DPLL) and Manchester Encoding/Decoding  
function for Ethernet operation.  
The TCI (Time Clock Invert) bit must be High to allow the QUICC to clock the data out to the  
LXT901 or LXT907 device on the rising edge of the clock pulse. This improves data setup  
time at the 10 Mbps speed used by Ethernet. TCI is bit 28 of the General SCC Mode Register  
(GSMR).  
Application Note  
7

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