LTC7103-1
PIN FUNCTIONS
RUN (Pin 3): Run Control Input. Holding this pin below
1.1V shuts off the switching regulator. Holding this pin
below 0.7V reduces the quiescent current to approxi-
mately 0.7µA. Place a resistor divider between VIN and
this pin to use as an undervoltage lockout. Tie this pin to
When not synchronizing to an external clock, this input
determines how the LTC7103-1 operates at light loads. Tie
this pin to SGND or float to select Burst Mode operation or
to INTV to force continuous inductor current operation.
Tie thisCpCin to INTV through a 100k resistor to select
CC
V to always enable the LTC7103-1.
IN
pulse-skipping operation. This pin sinks 10μA to SGND.
SGND (Pin 6): Signal Ground.
CLKOUT (Pin 13): Output clock signal available to syn-
chronize additional regulators for parallel operation. The
rising edge of CLKOUT is 180° out of phase with respect
to the rising edge of the SW pin. The output level swings
OVLO (Pin 7): Overvoltage Shutdown Input. If the voltage
on this pin exceeds 1.21V, then the switching regulator
is shut down and the SS pin is internally grounded. Tie
from SGND to INTV .
CC
this pin to SGND to allow operation with V up to 105V.
IN
PGOOD (Pin 14): Open-Drain Power Good Output. The
R
(Pin 8): Sets the current used to create an internal
IND
V
FB
pin is monitored to ensure that the output is in regu-
ramp that replicates the inductor current up-slope for low
duty cycle operation. This pin generates a voltage that
varies with the switching frequency. Place a resistor to
SGND on this pin equal to 1/(7.5 • L) to set the internal
ramp current. This pin can be left floating if fixed output
voltage mode is selected using the VPRG1 and VPRG2 pins.
lation. When the output is not in regulation, the PGOOD
pin is pulled low.
SS (Pin 15): Soft-Start and Regulator Timeout Input. The
voltage on the SS pin limits the regulated output voltage
when the SS voltage is less than 1V. An internal 11μA
pull-up current source is connected to this pin. A capaci-
tor to ground at this pin sets the ramp time to final regu-
lated output voltage. Leave this pin floating to use the
internal 1.2ms soft-start ramp. The SS pin also serves
If V
R
and V
are both floating, then a resistor from
PRG1
PRG2
to SGND must be used.
IND
ITH (Pin 9): Error Amplifier Output and Switching
Regulator Compensation Point. Place compensation
as a timeout to disable switching if the EXTV voltage
CC
components between the I pin and SGND. Tie this pin
TH
is too low. To disable the regulator timeout feature, tie a
to INTV for fixed internal compensation.
CC
75k resistor between SS and INTV . See Soft-Start and
CC
VFB (Pin 10): Regulator Feedback Input. When set to
LDO Regulator Timeout in the Applications Information
adjustable mode, use an external resistor divider between
section.
the regulator output voltage and the V pin. For fixed out-
FB
I
(Pin 16): Programs the Average Output Current in
CTRL
put voltage mode, tie V directly to the regulator output.
FB
Constant Current Mode. The voltage on this pin deter-
FREQ (Pin 11): The frequency control pin for the internal
mines the maximum I voltage, which in turn sets the
TH
VCO. Connect this pin to SGND for 300kHz operation or
average output current in constant-current mode. The
peak current limit tracks 1.2A above the average current
limit set point. Tie this pin to a voltage between 0.4V and
1.3V to program the average output current to a value
between 0A and 2.5A. An internal 20μA pull-up on this
pin allows a single resistor to SGND to be used to set the
voltage. Float this pin to set the average output current to
2.5A and the peak current limit to 3.7A.
to INTV for 1MHz operation. Place a resistor to SGND
CC
on this pin to set the operating frequency between 200kHz
and 2MHz. Minimize the capacitance on this pin if Burst
Mode operation is used. This pin sources 40µA.
PLLIN/MODE (Pin 12): External Synchronization Input
to Phase Detector and Burst Mode Control Input. When
an external clock is applied to this pin, the phase-locked
loop will force the rising edge of the SW signal to be
synchronized with the rising edge of the external clock,
and the LTC7103-1 operates in forced continuous mode.
I
(Pin 17): Average Output Current Monitor. This pin
MON
generates a voltage between 0.4V and 1.3V that corre-
sponds to an average output current between 0A and 2.5A.
Rev. 0
9
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