LTC6905-XXX Series
W U U
U
APPLICATIO S I FOR ATIO
then the oscillator frequency may show an additional
error if the switching frequency is 1.4MHz (80MHz/64).
The magnitude of this effect is heavily dependent on
supply bypass and routing.
START-UP TIME
The start-up and settling time to within 1% of the final
frequency is typically 100µs.
MAXIMUM OUTPUT LOAD
JITTER AND POWER SUPPLY NOISE
The LTC6905 output (Pin 5) can drive a capacitive load
(CLOAD) of 5pF or more. Performance driving a CLOAD
greater than 5pF depends on the oscillator’s frequency
(fOSC) and output resistance (ROUT). The output rise time
If the LTC6905 is powered by a supply that has frequency
contentequaltotheoutputfrequencythentheoutputjitter
mayincrease. Inaddition, powersupplyrippleinexcessof
20mV at any frequency may increase jitter.
or fall time due to ROUT and CLOAD is equal to 2.2 • ROUT
•
Higher divide ratios will result in lower percentage jitter.
For example, jitter percentage of the LTC6905-80 operat-
ing at 20MHz is lower than for the same part operating at
80MHz. Please consult the Jitter vs Frequency graph
showing jitter at various divider ratios.
C
LOAD(from10%to90%oftheriseorfalltransition).Ifthe
total output rise time plus fall time is arbitrarily specified
tobeequaltoorlessthan20%oftheoscillator’speriod(1/
fOSC), then the maximum output CLOAD in picofarads (pF)
should be equal to or less than [45454/(ROUT • fOSC)]
(ROUT in ohms and fOSC in MHz).
LTC6905 SUGGESTED CRITICAL COMPONENT
LAYOUT
Example: An LTC6905-100 is operating with a 3V power
supply and is set for a fOSC = 50MHz.
ROUT with V+ = 3V is 27Ω (using the ROUT vs V+ graph in
In order to provide the specified performance, it is re-
quired that the supply bypass capacitor be placed as close
as possible to the LTC6905. The following additional rules
should be followed for best performance:
the Typical Performance Characteristics).
The maximum output CLOAD should be equal to or less
than [45454/(27 • 50)] = 33.6pF.
1) The bypass capacitor must be placed as close as
possible to the LTC6905, and no vias should be placed
between the capacitor and the LTC6905. The bypass
capacitor must be on the same side of the circuit board
as the LTC6905.
The lowest resistive load Pin 5 can drive can be calculated
using the minimum high level output voltage in the Elec-
trical Characteristics. With a V+ equal to 5.5V and 4mA
output current, the minimum high level output voltage is
5.2V and the lowest resistive load Pin 5 can drive is 1.30k
(5.2V/4mA). With a V+ equal to 2.7V and 4mA output
current,theminimumhighleveloutputvoltageis2.4Vand
thelowestresistiveloadPin5candriveis600Ω(2.4V/4mA).
2) Ifagroundplaneisused,theconnectionoftheLTC6905
tothegroundplaneshouldbeascloseaspossibletothe
LTC6905GNDpinandshouldbecomposedofmultiple,
high current capacity vias.
FREQUENCY ACCURACY AND POWER SUPPLY NOISE
The frequency accuracy of the LTC6905 may be affected
when its power supply generates noise with frequency
contents equal to fMO/64 or its multiples. fMO is the
highest frequency for an LTC6905-XXX which is with
DIV = V+ (÷1). This is also the frequency indicated in the
part number (i.e., LTC6905-100, fMO = 100MHz). fMO/64
is the master oscillator control loop frequency. For ex-
ample, if the LTC6905-80 with a master oscillator fre-
quency of 80MHz is powered by a switching regulator,
C
LTC6905
6905x F02
Figure 2. LTC6905 Suggested Critical Component Layout
6905xf
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