LTC4151/LTC4151-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN is from 7V to 80V, unless noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
Transition Noise
(SENSE – SENSE )
IN
ADIN
1.2
0.3
22
μV
mV
μV
RMS
RMS
RMS
σT
V
l
f
t
Conversion Rate (Continuous Mode)
Conversion Time (Snapshot Mode)
6
7.5
9
Hz
CONV
CONV
+
–
l
l
(SENSE – SENSE )
ADIN, V
53
26
67
33
85
42
ms
ms
IN
l
l
R
ADIN Pin Input Resistance
ADIN Pin Input Current
ADIN = 3V
ADIN = 3V
2
10
MΩ
ADIN
I
2
μA
ADIN
2
I C Interface
l
l
V
ADR0, ADR1 Input High Threshold
ADRO, ADRI Input Low Threshold
ADRO, ADRI Input Current
2.3
0.3
2.65
0.6
2.9
0.9
70
V
V
ADR(H)
V
ADR(L)
l
l
I
ADR0, ADR1 = 0V or 3V
ADR0, ADR1 = 0.8V or 2.2V
μA
μA
ADR(IN)
8
l
l
l
l
V
SDA, SDAO Output Low Voltage
SDA, SDAI, SDAO, SCL Input Current
SDA, SDAI, SCL Input Threshold
SDA, SDAI, SCL Clamp Voltage
I
, I = 8mA
0.15
0
0.4
2
V
μA
V
SDA(OL)
SDA SDAO
I
SDA, SDAI, SDAO, SCL = 5V
SDA,SCL(IN)
V
V
1.6
5.5
1.8
6.1
2
SDA,SCL(TH)
I
, I
, I
= 3mA
6.6
V
SDA,SCL(CL)
SDA SDAI SCL
2
I C Interface Timing (Note 4)
f
t
t
t
Maximum SCL Clock Frequency
Minimum SCL Low Period
Minimum SCL High Period
400
kHz
μs
SCL(MAX)
LOW
0.65
50
1.3
600
1.3
ns
HIGH
Minimum Bus Free Time Between Stop/
Start Condition
0.12
μs
BUF(MIN)
t
t
Minimum Hold Time After (Repeated)
Start Condition
140
30
600
600
ns
ns
HD,STA(MIN)
Minimum Repeated Start Condition
Set-Up Time
SU,STA(MIN)
t
t
t
t
t
Minimum Stop Condition Set-Up Time
Minimum Data Hold Time Input
Minimum Data Hold Time Output
Minimum Data Set-Up Time Input
30
–100
600
30
600
0
ns
ns
ns
ns
ns
SU,STO(MIN)
HD,DATI(MIN)
HD,DATO(MIN)
SU,DAT(MIN)
SP(MAX)
300
900
100
250
Maximum Suppressed Spike
Pulse Width
50
20
110
t
Stuck-Bus Reset Time
SCL or SDA/SDAI Held Low
33
5
ms
pF
RST
C
SCL, SDA Input Capacitance
10
X
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: All currents into pins are positive. All voltages are referenced to
GND, unless otherwise noted.
Note 4: Guaranteed by design and not subject to test.
Note 5: Integral nonlinearity and total unadjusted error of V are tested
IN
Note 2: Internal clamps limit the SCL, SDA (LTC4151) and SDAI
(LTC4151-1) pins to a minimum of 5.5V. Driving these pins to voltages
beyond the clamp may damage the part. The pins can be safely tied to
higher voltages through a resistor that limits the current below 5mA.
between 7V and 80V.
Note 6: Offset error of V is defined by extrapolating the straight line
measured between 7V and 80V.
IN
41511fa
4