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LTC3372

更新时间： 2022-02-26 11:06:37
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凌特 - Linear /
页数 文件大小 规格书
44页 5626K
描述
60V Low IQ Buck Controller Plus 4-Channel 8A Configurable Buck DC/DCs

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LTC3372 数据手册

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LTC3372  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating  
junction temperature range, otherwise specifications are at TA = 25°C (Note 2), VIN = 12V, VRUN = 5V, VOUT = VINA-H = 3.3V unless  
otherwise noted.  
SYMBOL  
Temperature Monitor  
TEMP Voltage at 25°C  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX UNITS  
V
200  
220  
7
240  
mV  
mV/°C  
°C  
TEMP(ROOM)  
∆V  
OT  
/°C  
TEMP  
V
Slope  
TEMP  
Overtemperature Shutdown  
Overtemperature Hysteresis  
170  
10  
OT Hyst  
°C  
Low Voltage (LV) Buck Regulators  
l
l
V
V
Input Operating Voltage  
2.25  
0.8  
5.5  
V
V
INA-H  
Regulated Output Voltage Set Point  
Undervoltage Lockout Threshold on V  
V
INA-H  
OUT1-4  
l
l
UVLO  
V
V
Falling  
Rising  
1.95  
2.05  
2.05  
2.15  
2.15  
2.25  
V
V
INA-H  
INA-H  
INA-H  
I
I
Quiescent Current into V  
Pins, Per  
Burst Mode, FB1-4 = 0.82V  
Forced Continuous Mode, FB1-4 = 0V  
25  
35  
µA  
µA  
Q(VINA-H)  
INA-H  
Enabled LV Regulator (Note 8)  
400  
550  
Shutdown Current into V  
Pins  
INA-H  
0
1
µA  
mV  
mV  
SD(VINA-H)  
l
l
V
V
Regulated Feedback Voltage for Regulator 1  
792  
780  
800  
800  
808  
820  
FB1  
Regulated Feedback Voltage for Regulators  
2-4  
FB2-4  
I
Feedback Leakage Current  
Maximum Duty Cycle  
PMOS On-Resistance  
NMOS On-Resistance  
PMOS Leakage Current  
NMOS Leakage Current  
Soft-Start Time  
FB1-4 = 0.85V  
FB1-4 = 0V  
–50  
100  
50  
nA  
%
FB1-4  
l
D
R
R
MAX  
PMOS  
NMOS  
LEAKP  
LEAKN  
SS  
I
SW  
I
SW  
= 100mA, 1A – Per Power Stage  
= –100mA, 1A – Per Power Stage  
290  
180  
mΩ  
mΩ  
µA  
I
I
t
EN1-4 = GND  
EN1-4 = GND  
(Note 10)  
–1  
–1  
1
1
µA  
0.25  
–4  
1.5  
3
ms  
l
l
l
UV  
Rising Undervoltage RST Threshold  
Regulator 1  
% Relative to Regulated V  
Hysteresis  
–2  
1
–1  
%
%
FB  
FB  
FB  
Rising RST Undervoltage Threshold  
Regulators 2-4  
% Relative to Regulated V  
Hysteresis  
–7  
+5  
–5  
1
–3  
+10  
2.2  
%
%
OV  
RST Overvoltage Threshold of Regulators  
1-4  
% Relative to Regulated V  
Hysteresis  
+7.5  
–3  
%
%
I
PMOS Current Limit  
1 Buck with 1 Power Stage (Note 9)  
1 Buck with 2 Power Stages (Note 9)  
1 Buck with 3 Power Stages (Note 9)  
1 Buck with 4 Power Stages (Note 9)  
1.4  
1.8  
3.6  
5.4  
7.2  
A
A
A
A
LIM  
Interface Logic Pins (RST, WDO, WDI, CT, C1, C2, C3)  
I
Output High Leakage Current  
Output Low Voltage  
RST, WDO 5.5V at Pin  
RST, WDO 3mA at Pin  
1
µA  
V
OH  
V
V
0.1  
0.4  
OL  
IH  
l
l
l
l
WDI Input High Threshold  
CT, C1, C2, C3 Input High Threshold  
WDI, C1, C2, C3 Input Low Threshold  
WDI Pulse Width  
1.2  
V
INTV – 0.4  
V
CC  
V
0.4  
V
IL  
t
80  
ns  
WDI(WIDTH)  
Rev. A  
6
For more information www.analog.com  
1...3456789...44

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