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LTC2927IDDB-TRPBF

更新时间： 2024-02-11 23:59:53
品牌 Logo 应用领域
凌特 - Linear 控制器
页数 文件大小 规格书
16页 255K
描述
Single Power Supply Tracking Controller

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LTC2927IDDB-TRPBF 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：DFN包装说明：HVSON, SOLCC8,.08,20
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.12可调阈值：YES
模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUITJESD-30 代码：R-PDSO-N8
JESD-609代码：e3长度：3 mm
湿度敏感等级：1信道数量：1
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVSON
封装等效代码：SOLCC8,.08,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：3.3/5 V认证状态：Not Qualified
座面最大高度：0.8 mm子类别：Power Management Circuits
最大供电电流 (Isup)：4.2 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.9 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：2 mm
Base Number Matches：1

LTC2927IDDB-TRPBF 数据手册

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LTC2927  
U
W U U  
APPLICATIO S I FOR ATIO  
Power Supply Tracking and Sequencing  
before a block of logic. In this case, the supplies are se-  
quenced as in Figure 4 where the 2.5V supply ramps up  
after the 1.8V supply is completely powered.  
The LTC2927 handles a variety of power-up profiles to  
satisfy the requirements of digital logic circuits including  
FPGAs, PLDs, DSPs and microprocessors. These require-  
mentsfallintooneofthefourgeneralcategoriesillustrated  
in Figures 1 to 4.  
Operation  
The LTC2927 provides a simple solution to all of the  
power supply tracking and sequencing profiles shown in  
Figures 1 to 4. A single LTC2927 controls a single sup-  
ply that tracks to a “master” signal. With two resistors,  
a slave supply is configured to ramp up as a function of  
the master signal. This master signal can be a separate  
supply or it can be a ramp signal generated by tying the  
RAMP pin to an external capacitor.  
Some applications require that the potential difference  
between two power supplies must never exceed a speci-  
fied voltage. This requirement applies during power-up  
and power-down as well as during steady-state operation,  
often to prevent destructive latch-up in a dual supply  
ASIC. Typically, this is achieved by ramping the supplies  
up and down together (Figure 1). In other applications it  
is desirable to have supplies ramp up and down with fixed  
voltage offsets between them (Figure 2) or to have them  
ramp up and down ratiometrically (Figure 3).  
Tracking Cell  
The LTC2927’s operation is based on the tracking cell  
shown in Figure 5, which uses a proprietary wide-range  
current mirror. The tracking cell shown in Figure 5 servos  
the TRACK pin at 0.8V. The current supplied by the TRACK  
Certain applications require one supply to come up after  
another. For example, a system clock may need to start  
MASTER  
SLAVE1  
MASTER  
SLAVE1  
1V/DIV  
1V/DIV  
SLAVE2  
SLAVE2  
2927 F01  
2927 F02  
10ms/DIV  
10ms/DIV  
Figure 1. Coincident Tracking  
Figure 2. Offset Tracking  
MASTER  
MASTER  
SLAVE1  
SLAVE1  
SLAVE2  
1V/DIV  
1V/DIV  
SLAVE2  
2927 F03  
2927 F04  
10ms/DIV  
10ms/DIV  
Figure 3. Ratiometric Tracking  
Figure 4. Supply Sequencing  
2927fb  
6
1...3456789...16

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