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LTC2634CUD-HMI8PBF PDF预览

LTC2634CUD-HMI8PBF

更新时间: 2024-01-31 12:25:17
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
28页 377K
描述
Quad 12-/10-/8-Bit Rail-to-Rail DACs with 10ppm/°C Reference

LTC2634CUD-HMI8PBF 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
针数:16Reach Compliance Code:compliant
风险等级:5.13最大模拟输出电压:4.096 V
最小模拟输出电压:转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PQCC-N16JESD-609代码:e3
长度:3 mm最大线性误差 (EL):0.1953%
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:0.8 mm标称安定时间 (tstl):3.8 µs
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:3 mm

LTC2634CUD-HMI8PBF 数据手册

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LTC2634  
OPERATION  
Rail-to-Rail Output Considerations  
the LTC2634 GND pin to the ground plane should be as  
low as possible. Resistance here will add directly to the  
effective DC output impedance of the device (typically  
0.1Ω). Note that the LTC2634 is no more susceptible to  
this effect than any other parts of this type; on the con-  
trary, it allows layout-based performance improvements  
to shine rather than limiting attainable performance with  
excessive internal resistance.  
Inanyrail-to-railvoltageoutputdevice,theoutputislimited  
to voltages within the supply range.  
SincetheanalogoutputoftheDACcannotgobelowground,  
it may limit for the lowest codes as shown in Figure 4b.  
Similarly, limiting can occur near full-scale when the REF  
pin is tied to V . If V = V and the DAC full-scale error  
CC  
REF  
CC  
(FSE) is positive, the output for the highest codes limits  
Another technique for minimizing errors is to use a sepa-  
rate power ground return trace on another board layer.  
The trace should run between the point where the power  
supply is connected to the board and the DAC ground pin.  
Thus the DAC ground pin becomes the common point for  
analog ground, digital ground, and power ground. When  
the LTC2634 is sinking large currents, this current flows  
out the ground pin and directly to the power ground trace  
without affecting the analog ground plane voltage.  
at V , as shown in Figure 4c. No full-scale limiting can  
CC  
occur if V is less than V – FSE.  
REF  
CC  
Offset and linearity are defined and tested over the region  
of the DAC transfer function where no output limiting can  
occur.  
Board Layout  
ThePCboardshouldhaveseparateareasfortheanalogand  
digital sections of the circuit. A single, solid ground plane  
should be used, with analog and digital signals carefully  
routed over separate areas of the plane. This keeps digital  
signals away from sensitive analog signals and minimizes  
the interaction between digital ground currents and the  
analog section of the ground plane. The resistance from  
It is sometimes necessary to interrupt the ground plane  
to confine digital ground currents to the digital portion of  
the plane. When doing this, make the gap in the plane only  
as long as it needs to be to serve its purpose and ensure  
that no traces cross over the gap.  
2634f  
22  

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