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LTC2324-12 PDF预览

LTC2324-12

更新时间： 2023-12-20 18:45:47
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
30页 988K
描述
4 通道、12 位带符号位、每通道 2Msps、同时采样 ADC

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中文翻译

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LTC2324-12 数据手册

 浏览型号LTC2324-12的Datasheet PDF文件第2页浏览型号LTC2324-12的Datasheet PDF文件第3页浏览型号LTC2324-12的Datasheet PDF文件第4页浏览型号LTC2324-12的Datasheet PDF文件第5页浏览型号LTC2324-12的Datasheet PDF文件第6页浏览型号LTC2324-12的Datasheet PDF文件第7页 
LTC2324-12  
Quad, 12-Bit + Sign,  
2Msps/Ch  
Simultaneous Sampling ADC  
DescripTion  
FeaTures  
The LTC®2324-12 is a low noise, high speed quad 12-bit  
+ sign successive approximation register (SAR) ADC with  
differential inputs and wide input common mode range.  
Operating from a single 3.3V or 5V supply, the LTC2324-  
n
2Msps/Ch Throughput Rate  
n
Four Simultaneously Sampling Channels  
n
Guaranteed 12-Bit, No Missing Codes  
n
8V Differential Inputs with Wide Input  
P-P  
Common Mode Range  
12 has an 8V differential input range, making it ideal  
P-P  
n
n
n
n
n
78dB SNR (Typ) at f = 500kHz  
for applications which require a wide dynamic range with  
high common mode rejection. The LTC2324-12 achieves  
±±.5LSꢀ INL typical, no missing codes at 12 bits and  
78dꢀ SNR.  
IN  
IN  
–88dB THD (Typ) at f = 500kHz  
Guaranteed Operation to 125°C  
Single 3.3V or 5V Supply  
Low Drift (2±ppm/°C Max) 2.±48V or 4.±96V  
Internal Reference  
TheLTC2324-12hasanonboardlowdrift(2±ppm/°Cmax)  
2.±48V or 4.±96V temperature-compensated reference.  
The LTC2324-12 also has a high speed SPI-compatible  
serial interface that supports CMOS or LVDS. The fast  
2Msps per channel throughput with no latency makes the  
LTC2324-12 ideally suited for a wide variety of high speed  
applications. The LTC2324-12 dissipates only 4±mW per  
channel and offers nap and sleep modes to reduce the  
power consumption to 26μW for further power savings  
during inactive periods.  
n
n
n
n
1.8V to 2.5V I/O Voltages  
CMOS or LVDS SPI-Compatible Serial I/O  
Power Dissipation 4±mW/Ch (Typ)  
Small 52-Lead (7mm × 8mm) QFN Package  
applicaTions  
n
High Speed Data Acquisition Systems  
n
Communications  
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and  
ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their  
respective owners.  
Optical Networking  
Multiphase Motor Control  
n
Typical applicaTion  
32k Point FFT fSMPL = 2Msps,  
10µF  
1µF  
TRUE DIFFERENTIAL INPUTS  
NO CONFIGURATION REQUIRED  
f
IN = 500kHz  
3.3V OR 5V  
1.8V TO 2.5V  
0
–20  
+
–
IN , IN  
SNR = 78.5dB  
V
GND  
GND  
O
THD = –87.8dB  
DD  
V
DD  
ARBITRARY  
DIFFERENTIAL  
SINAD = 78.2dB  
SFDR = 95.9dB  
V
V
CMOS/LVDS  
SDR/DDR  
REFBUFEN  
DD  
0V  
DD  
0V  
DD  
0V  
DD  
0V  
+
A
12-BIT + SIGN  
SAR ADC  
IN1  
S/H  
–
A
–40  
IN1  
+
SDO1  
SDO2  
SDO3  
SDO4  
CLKOUT  
SCK  
A
A
12-BIT + SIGN  
SAR ADC  
–60  
IN2  
S/H  
–
IN2  
–80  
LTC2324-12  
BIPOLAR  
UNIPOLAR  
+
A
A
12-BIT + SIGN  
SAR ADC  
–100  
–120  
–140  
IN3  
V
V
S/H  
–
IN3  
CNV  
SAMPLE  
+
A
A
12-BIT + SIGN  
SAR ADC  
CLOCK  
IN4  
S/H  
–
IN4  
0
0.2  
0.4  
0.6  
0.8  
1
REF  
REFOUT1 REFOUT2  
10µF 10µF  
REFOUT3 REFOUT4  
FREQUENCY (MHz)  
232412 TA01b  
1µF  
10µF  
10µF  
FOUR SIMULTANEOUS  
SAMPLING CHANNELS  
232412 TA01a  
232412fa  
1
For more information www.linear.com/LTC2324-12  
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