LTC2298/LTC2297/LTC2296
Dual 14-Bit, 65/40/25Msps
Low Power 3V ADCs
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FEATURES
DESCRIPTIO
The LTC®2298/LTC2297/LTC2296 are 14-bit 65Msps/
40Msps/25Msps, low power dual 3V A/D converters de-
signed for digitizing high frequency, wide dynamic range
signals. The LTC2298/LTC2297/LTC2296 are perfect for
demanding imaging and communications applications
with AC performance that includes 74.3dB SNR and 90dB
SFDR for signals at the Nyquist frequency.
■
Integrated Dual 14-Bit ADCs
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Sample Rate: 65Msps/40Msps/25Msps
■
Single 3V Supply (2.7V to 3.4V)
■
Low Power: 400mW/235mW/150mW
■
74.3dB SNR
90dB SFDR
■
■
110dB Channel Isolation at 100MHz
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Multiplexed or Separate Data Bus
DC specs include ±1.2LSB INL (typ), ±0.5LSB DNL (typ)
■
Flexible Input: 1VP-P to 2VP-P Range
and no missing codes over temperature. The transition
■
575MHz Full Power Bandwidth S/H
noise is a low 1LSBRMS
.
■
Clock Duty Cycle Stabilizer
■
Shutdown and Nap Modes
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
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Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
Asingle-endedCLKinputcontrolsconverteroperation.An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
64-Pin (9mm × 9mm) QFN Package
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APPLICATIO S
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Wireless and Wired Broadband Communication
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Imaging Systems
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Spectral Analysis
Portable Instrumentation
■
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TYPICAL APPLICATIO
LTC2298: SNR vs Input Frequency,
–1dB, 2V Range, 65Msps
OV
DD
+
14-BIT
PIPELINED
ADC CORE
75
74
73
72
71
70
INPUT
S/H
ANALOG
INPUT A
D13A
OUTPUT
DRIVERS
•
•
•
–
D0A
OGND
CLOCK/DUTY CYCLE
CONTROL
CLK A
CLK B
MUX
CLOCK/DUTY CYCLE
CONTROL
OV
DD
D13B
+
50
100
150
0
200
OUTPUT
DRIVERS
•
•
•
14-BIT
PIPELINED
ADC CORE
ANALOG
INPUT B
INPUT
S/H
INPUT FREQUENCY (MHz)
D0B
229876 TA01b
–
OGND
229876 TA01
229876fa
1