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LTC2297IUP#TRPBF PDF预览

LTC2297IUP#TRPBF

更新时间: 2024-09-25 13:09:51
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凌特 - Linear /
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LTC2297IUP#TRPBF 数据手册

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LTC2298/LTC2297/LTC2296  
Dual 14-Bit, 65/40/25Msps  
Low Power 3V ADCs  
U
FEATURES  
DESCRIPTIO  
The LTC®2298/LTC2297/LTC2296 are 14-bit 65Msps/  
40Msps/25Msps, low power dual 3V A/D converters de-  
signed for digitizing high frequency, wide dynamic range  
signals. The LTC2298/LTC2297/LTC2296 are perfect for  
demanding imaging and communications applications  
with AC performance that includes 74dB SNR and 85dB  
SFDR for signals well beyond the Nyquist frequency.  
Integrated Dual 14-Bit ADCs  
Sample Rate: 65Msps/40Msps/25Msps  
Single 3V Supply (2.7V to 3.4V)  
Low Power: 400mW/235mW/150mW  
74dB SNR up to 70MHz Input  
85dB SFDR up to 70MHz Input  
110dB Channel Isolation at 100MHz  
Multiplexed or Separate Data Bus  
DC specs include ±1.2LSB INL (typ), ±0.5LSB DNL (typ)  
Flexible Input: 1VP-P to 2VP-P Range  
and no missing codes over temperature. The transition  
575MHz Full Power Bandwidth S/H  
noise is a low 1LSBRMS  
.
Clock Duty Cycle Stabilizer  
A single 3V supply allows low power operation. A separate  
output supply allows the outputs to drive 0.5V to 3.3V  
logic. An optional multiplexer allows both channels to  
share a digital output bus.  
Shutdown and Nap Modes  
Pin Compatible Family  
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)  
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)  
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)  
64-Pin (9mm × 9mm) QFN Package  
U
Asingle-endedCLKinputcontrolsconverteroperation.An  
optional clock duty cycle stabilizer allows high perfor-  
mance at full speed for a wide range of clock duty cycles.  
APPLICATIO S  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
Wireless and Wired Broadband Communication  
Imaging Systems  
Spectral Analysis  
Portable Instrumentation  
U
TYPICAL APPLICATIO  
OV  
DD  
+
LTC2298: SNR vs Input Frequency,  
14-BIT  
PIPELINED  
ADC CORE  
INPUT  
S/H  
ANALOG  
INPUT A  
D13A  
–1dB, 2V Range, 65Msps  
OUTPUT  
DRIVERS  
75  
D0A  
OGND  
74  
73  
72  
71  
70  
CLOCK/DUTY CYCLE  
CONTROL  
CLK A  
CLK B  
MUX  
CLOCK/DUTY CYCLE  
CONTROL  
OV  
DD  
D13B  
+
OUTPUT  
DRIVERS  
14-BIT  
PIPELINED  
ADC CORE  
ANALOG  
INPUT B  
100  
INPUT FREQUENCY (MHz)  
0
50  
150  
200  
INPUT  
S/H  
D0B  
229876 TA01b  
OGND  
229876 TA01  
229876f  
1

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