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LTC2241CUP-10#PBF PDF预览

LTC2241CUP-10#PBF

更新时间: 2024-01-18 14:46:43
品牌 Logo 应用领域
凌特 - Linear 转换器
页数 文件大小 规格书
28页 492K
描述
LTC2241-10 - 10-Bit, 210Msps ADC; Package: QFN; Pins: 64; Temperature Range: 0°C to 70°C

LTC2241CUP-10#PBF 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC64,.35SQ,20
针数:64Reach Compliance Code:compliant
ECCN代码:3A991.C.1HTS代码:8542.39.00.01
风险等级:5.09Is Samacsys:N
最大模拟输入电压:1 V最小模拟输入电压:-1 V
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-PQCC-N64
JESD-609代码:e3长度:9 mm
最大线性误差 (EL):0.0781%湿度敏感等级:1
模拟输入通道数量:1位数:10
功能数量:1端子数量:64
最高工作温度:70 °C最低工作温度:
输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式:PARALLEL, WORD
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC64,.35SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:2.5 V认证状态:Not Qualified
采样速率:210 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:0.8 mm子类别:Analog to Digital Converters
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:9 mm
Base Number Matches:1

LTC2241CUP-10#PBF 数据手册

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LTC2241-10  
10-Bit, 210Msps ADC  
FEATURES  
DESCRIPTION  
The LTC®2241-10 is a 210Msps, sampling 10-bit A/D con-  
verterdesignedfordigitizinghighfrequency,widedynamic  
range signals. The LTC2241-10 is perfect for demanding  
communications applications with AC performance that  
includes 60.5dB SNR and 78dB SFDR. Ultralow jitter of  
n
Sample Rate: 210Msps  
n
60.5dB SNR  
n
78dB SFDR  
n
1.2GHz Full Power Bandwidth S/H  
n
Single 2.5V Supply  
n
Low Power Dissipation: 585mW  
95fs  
allows IF undersampling with excellent noise  
RMS  
performance.  
n
LVDS, CMOS, or Demultiplexed CMOS Outputs  
n
Selectable Input Ranges: 0.5V or 1V  
DC specs include 0.3LSB INL (typ), 0.15LSB DNL (typ)  
and no missing codes over temperature.  
n
No Missing Codes  
n
Optional Clock Duty Cycle Stabilizer  
n
The digital outputs can be either differential LVDS, or  
single-ended CMOS. There are three format options for  
the CMOS outputs: a single bus running at the full data  
rate or two demultiplexed buses running at half data rate  
witheitherinterleavedorsimultaneousupdate. Aseparate  
output power supply allows the CMOS output swing to  
range from 0.5V to 2.625V.  
Shutdown and Nap Modes  
n
Data Ready Output Clock  
n
Pin Compatible Family  
250Msps: LTC2242-12 (12-Bit), LTC2242-10 (10-Bit)  
210Msps: LTC2241-12 (12-Bit), LTC2241-10 (10-Bit)  
170Msps: LTC2240-12 (12-Bit), LTC2240-10 (10-Bit)  
185Msps: LTC2220-1 (12-Bit)*  
170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)*  
135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)*  
+
The ENC and ENC inputs may be driven differentially or  
single ended with a sine wave, PECL, LVDS, TTL, or CMOS  
inputs. An optional clock duty cycle stabilizer allows high  
performance over a wide range of clock duty cycles.  
n
64-Pin 9mm × 9mm QFN Package  
APPLICATIONS  
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
*LTC2220-1, LTC2220, LTC2221, LTC2230, LTC2231 are 3.3V parts.  
n
Wireless and Wired Broadband Communication  
n
Cable Head-End Systems  
n
Power Amplifier Linearization  
n
Communications Test Equipment  
TYPICAL APPLICATION  
2.5V  
V
SFDR vs Input Frequency  
DD  
0.5V  
TO 2.625V  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
REFH  
FLEXIBLE  
REFERENCE  
REFL  
OV  
DD  
D9  
+
10-BIT  
PIPELINED  
ADC CORE  
CMOS  
OR  
LVDS  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
INPUT  
S/H  
D0  
1V RANGE  
OGND  
2V RANGE  
CLOCK/DUTY  
CYCLE  
CONTROL  
0
100 200 300 400 500 600 700 800 9001000  
INPUT FREQUENCY (MHz)  
224110 G11  
224110 TA01  
ENCODE  
INPUT  
224110fb  
1

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