Datasheet > LTC1265-5_15

LTC1265-5_15

更新时间： 2022-02-26 11:51:49

品牌	Logo	应用领域
凌特 - Linear		/
页数	文件大小	规格书
16页	243K
描述
1.2A, High Efficiency Step-Down DC/DC Converter

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LTC1265-5_15 数据手册

LTC1265/LTC1265-3.3/LTC1265-5

W U U

APPLICATIO S I FOR ATIO

PWR V

LTC1265

0.1µF

PGND

SGND

SHDN

OUT

1000pF

3900pF

SHDN

OUT

N/C (V

SENSE

)

SENSE

–

SENSE

OUT

1000pF

OUTPUT DIVIDER REQUIRED

WITH ADJUSTABLE VERSION ONLY

BOLD LINES INDICATE

HIGH PATH CURRENTS

LTC1265 F06

Figure 6. LTC1265 Layout Diagram (See Board Layout Checklist)

Troubleshooting Hints

3.3V

Since efficiency is critical to LTC1265 applications, it is

very important to verify that the circuit is functioning

correctlyinbothcontinuousandBurstModeoperation.As

the LTC1265 is highly tolerant of poor layout, the output

voltage will still be regulated. Therefore, monitoring the

output voltage will not tell you whether you have a good or

bad layout. The waveform to monitor is the voltage on the

timing capacitor Pin 5.

2.4V

TIME

(a) CONTINUOUS MODE OPERATION

LTC1265 F07a

IncontinuousmodethevoltageontheC_Tpinisasawtooth

with approximately 0.9V_P-Pswing. This voltage should

never dip below 2V as shown in Figure 7a.

SLEEP MODE

3.3V

2.4V

When the load currents are low (I_LOAD< I_BURST) Burst

Mode operation occurs. The voltage on C_Tpin now falls to

ground for periods of time as shown in Figure 7b. During

this time the LTC1265 is in sleep mode with quiescent

current reduced to 160µA.

TIME

(b) Burst Mode OPERATION

LTC1265 F07b

The inductor current should also be monitored. If the

circuit is poorly decoupled, the peak inductor current will

be haphazard as in Figure 8a. A well decoupled LTC1265

has a clean inductor current as in Figure 8b.

Figure 7. C_TWaveforms

1...8 9 101112 13 14...16

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