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LTC1090AC PDF预览

LTC1090AC

更新时间： 2024-02-27 03:24:51
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
28页 343K
描述
Single Chip 10-Bit Data Acquisition System

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中文翻译

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LTC1090AC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP20,.3
针数：20Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.75最大模拟输入电压：5.05 V
最小模拟输入电压：-5.05 V转换器类型：ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码：R-GDIP-T20JESD-609代码：e0
最大线性误差 (EL)：0.0488%标称负供电电压：-5 V
模拟输入通道数量：8位数：10
功能数量：1端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出位码：BINARY输出格式：SERIAL
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5,GND/-5 V认证状态：Not Qualified
采样速率：0.045 MHz采样并保持/跟踪并保持：SAMPLE
座面最大高度：5.08 mm子类别：Analog to Digital Converters
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

LTC1090AC 数据手册

 浏览型号LTC1090AC的Datasheet PDF文件第21页浏览型号LTC1090AC的Datasheet PDF文件第22页浏览型号LTC1090AC的Datasheet PDF文件第23页浏览型号LTC1090AC的Datasheet PDF文件第25页浏览型号LTC1090AC的Datasheet PDF文件第26页浏览型号LTC1090AC的Datasheet PDF文件第27页 
LTC1090  
U
TYPICAL APPLICATIO  
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4  
SNEAK-A-BIT  
V
IN  
MNEMONIC  
DESCRIPTION  
5V  
5V  
V
( + ) CH6  
( – ) CH7  
IN  
READ–/+: LDA #$3F  
Load D word for LTC1090 into ACC  
IN  
1ST CONVERSION  
1024 STEPS  
JSR TRANSFER Read LTC1090 routine  
LDA $60  
STA $71  
LDA $61  
Load MSBs from LTC1090 into ACC  
Store MSBs in $71  
Load LSBs from LTC1090 into ACC  
Store LSBs in $72  
SOFTWARE  
1ST CONVERSION  
2047 STEPS  
0V  
0V  
0V  
STA $72  
2ND CONVERSION  
1024 STEPS  
RTS  
Return  
V
( – ) CH6  
( + ) CH7  
IN  
READ+/–: LDA #$7F  
Load D word for LTC1090 into ACC  
IN  
JSR TRANSFER Read LTC1090 routine  
LDA $60  
STA $73  
–5V  
–5V  
Load MSBs from LTC1090 into ACC  
Store MSBs in $73  
2ND CONVERSION  
LDA $61  
STA $74  
Load LSBs from LTC1090 into ACC  
Store LSBs in $74  
SNEAK-A-BIT Code  
RTS  
Return  
TRANSFER:BCLR 0, $02  
STA $0C  
LOOP 1: TST $0B  
BPL LOOP 1  
LDA $0C  
STA $0C  
STA $60  
LOOP 2: TST $0B  
BPL LOOP 2  
BSET 0, $02  
LDA $0C  
CS goes low  
D
from LTC1090 in MC68HC05C4 RAM  
Sign  
OUT  
Load D into SPI. Start transfer  
IN  
Test status of SPlF  
Loop to previous instruction if not done  
Load contents of SPI data reg into ACC  
Start next cycle  
Store MSBs in $60  
Test status of SPlF  
Loop to previous instruction if not done  
CS goes high  
Load contents of SPI data reg into ACC  
Location $77  
B10 B9 B8 B7 B6 B5 B4 B3  
LSB  
B2 B1 B0  
filled with 0s  
Location $87  
D
words for LTC1090  
IN  
MSBF  
STA $61  
RTS  
CHK SIGN: LDA $73  
Store LSBs in $61  
Return  
MUX Addr.  
(ODD/SIGN)  
UNI  
Word  
Length  
Load MSBs of +/–read into ACC  
Or ACC (MSBs) with LSBs of +/–read  
If result is 0 goto minus  
Clear carry  
Rotate right $73 through carry  
Rotate right $74 through carry  
Load MSBs of +/–read into ACC  
Store MSBs in RAM location $77  
Load LSBs of +/–read into ACC  
Store LSBs in RAM location $87  
Goto end of routine  
ORA $74  
BEQ MINUS  
CLC  
ROR $73  
ROR $74  
LDA $73  
STA $77  
LDA $74  
STA $87  
D
D
D
1
2
3
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IN  
IN  
IN  
1
0
1
1
LTC1090 • TA05  
BRA END  
CLC  
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4  
MINUS:  
Clear carry  
ROR $71  
ROR $72  
COM $71  
COM $72  
LDA $72  
ADD #$01  
STA $72  
CLRA  
ADC $71  
STA $71  
STA $77  
LDA $72  
STA $87  
RTS  
Shift MSBs of – /+ read right  
Shift LSBs of – /+ read right  
1’s complement of MSBs  
1’s complement of LSBs  
Load LSBs into ACC  
Add 1 to LSBs  
Store ACC in $72  
Clear ACC  
Add with carry to MSBs. Result in ACC  
Store ACC in $71  
Store MSBs in RAM location $77  
Load LSBs in ACC  
Store LSBs in RAM location $87  
MNEMONIC  
DESCRIPTION  
LDA #$50  
Configuration data for SPCR  
Load configuration data into $0A  
Configuration data for port C DDR  
Load configuration data into port C DDR  
Make sure CS is high  
STA  
LDA #$FF  
STA $06  
BSET 0, $02  
$0A  
JSR  
READ–/+  
Dummy read configures LTC1090 for next  
read  
JSR  
JSR  
JSR  
READ+/–  
READ–/+  
CHK SIGN  
Read CH6 with respect to CH7  
Read CH7 with respect to CH6  
Determines which reading has valid data,  
converts to 2’s complement and stores in  
RAM  
END:  
Return  
1090fc  
24  
1...2122232425262728

中文翻译

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