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LT3581HDE#TRPBF PDF预览

LT3581HDE#TRPBF

更新时间: 2024-02-20 18:58:44
品牌 Logo 应用领域
凌特 - Linear 开关光电二极管
页数 文件大小 规格书
36页 456K
描述
LT3581 - 3.3A Boost/Inverting DC/DC Converter with Fault Protection; Package: DFN; Pins: 14; Temperature Range: -40°C to 125°C

LT3581HDE#TRPBF 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVSON,
针数:14Reach Compliance Code:compliant
风险等级:5.6模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:22 V最小输入电压:2.5 V
标称输入电压:5 VJESD-30 代码:R-PDSO-N14
长度:4 mm功能数量:1
端子数量:14最高工作温度:150 °C
最低工作温度:-40 °C最大输出电流:5.4 A
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:0.8 mm
表面贴装:YES切换器配置:BOOST
最大切换频率:2750 kHz温度等级:AUTOMOTIVE
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

LT3581HDE#TRPBF 数据手册

 浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第4页浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第5页浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第6页浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第8页浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第9页浏览型号LT3581HDE#TRPBF的Datasheet PDF文件第10页 
LT3581  
PIN FUNCTIONS (DFN/MSOP)  
FB (Pin 1/Pin 1): Positive and Negative Feedback Pin. For  
CLKOUT (Pin 10/Pin 12): Clock Output Pin. Use this pin  
to synchronize one or more other compatible switching  
regulatorICstotheLT3581. Theclockthatthispinoutputs  
runs at the same frequency as the internal oscillator of the  
part or as the SYNC pin. CLKOUT may also be used as a  
temperature monitor since the CLKOUT pin’s duty cycle  
varies linearly with the part’s junction temperature. Note  
that the CLKOUT pin is only meant to drive capacitive  
loads up to 50pF.  
a Boost or Inverting Converter, tie a resistor from the FB  
pin to V  
according to the following equations:  
OUT  
V
1.215V  
OUT  
RFB =  
;Boost or SEPIC Converter  
83.310–6  
|V |+ 9mV  
OUT  
RFB =  
;InvertingConverter  
83.310–6  
V (Pin 2/Pin 2): Error Amplifier Output Pin. Tie external  
C
SHDN (Pin 11/Pin 13): Shutdown Pin. In conjunction  
with the UVLO (undervoltage lockout) circuit, this pin is  
used to enable/disable the chip and restart the soft-start  
sequence. Drive below 300mV to disable the chip. Drive  
above 1.33V (typical) to activate the chip and restart the  
soft-start sequence. Do not float this pin.  
compensation network to this pin.  
GATE (Pin 3/Pin 3): PMOS Gate Drive Pin. The GATE pin  
is a pull-down current source, used to drive the gate of  
an external PMOS for output short circuit protection or  
outputdisconnect.TheGATEpincurrentincreaseslinearly  
with the SS pin’s voltage, with a maximum pull-down  
current of 933µA at SS voltages exceeding 500mV. Note  
that if the SS voltage is greater than 500mVand the GATE  
pin voltage is less than 2V, then the GATE pin looks like  
a 2kΩ impedance to ground. See the Appendix for more  
information.  
RT (Pin 12/Pin 14): Timing Resistor Pin. Adjusts the  
LT3581’s switching frequency. Place a resistor from this  
pin to ground to set the frequency to a fixed free running  
level. Do not float this pin.  
SS (Pin 13/Pin 15): Soft-Start Pin. Place a soft-start  
capacitor here. Upon start-up, the SS pin will be charged  
by a (nominally) 250k resistor to about 2.1V. During a  
fault, the SS pin will be slowly charged up and eventually  
discharged as part of a timeout sequence (see the State  
Diagram for more information on the SS pin’s role during  
a fault event).  
FAULT (Pin 4/Pin 4): Fault Indication Pin. This active low,  
bidirectional pin can either be pulled low (below 750mV)  
by an external source, or internally by the chip to indicate a  
fault. When pulled low, this pin causes the power switches  
to turn off, the GATE pin to become high impedance, the  
CLKOUT pin to become disabled, and the SS pin to go  
through a charge/discharge sequence. The end/absence  
of a fault is indicated when the voltage on this pin exceeds  
1V. A pull-up resistor or current source is needed on this  
pin to pull it above 1V in the absence of a fault.  
SYNC (Pin 14/Pin 16): To synchronize the switching  
frequency to an outside clock, simply drive this pin with  
a clock. The high voltage level of the clock must exceed  
1.3V, and the low level must be less than 0.4V. Drive this  
pin to less than 0.4V to revert to the internal free running  
clock. See the Applications Information section for more  
information.  
V
(Pin 5/Pin 5): Input Supply Pin. Must be locally by-  
IN  
passed.  
SW1(Pins6,7/Pins6,7,8):MasterSwitchPin.Thisisthe  
collector of the internal master NPN power switch.  
Minimize the metal trace area connected to this pin to  
minimize EMI.  
GND (Exposed Pad Pin 15/Exposed Pad Pin 17): Ground.  
Exposed pad must be soldered directly to local ground  
plane.  
SW2 (Pins 8, 9/Pins 9, 10, 11): Slave Switch Pin. This  
is the collector of the internal slave NPN power switch.  
Minimize the metal trace area connected to this pin to  
minimize EMI.  
3581fb  
7
For more information www.linear.com/LT3581  

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