LT1381
U
U
U
PI FU CTIO S
C1+, C1–, C2+, C2– (Pins 1, 3, 4, 5): Commutating
Capacitor Inputs. These pins require two external capaci-
tors C ≥ 0.1µF: one from C1+ to C1– and another from C2+
to C2–. C1 may be deleted if a separate 12V supply is
available and connected to pin C1+.
V+ (Pin 2): Positive Supply Output (RS232 Drivers).
V+ ≈ 2VCC – 2.1V. This pin requires an external charge
storage capacitor C ≥ 0.1µF, tied to ground or VCC. Larger
valuecapacitorsmaybeusedtoreducesupplyripple.With
multipletransceivers,theV+ andV– pinsmaybeparalleled
into common capacitors.
V– (Pin 6): Negative Supply Output (RS232 Drivers).
V– ≈ –(2VCC – 3V). This pin requires an external charge
storage capacitor C ≥ 0.1µF. Larger value capacitors may
be used to reduce supply ripple. With multiple transceiv-
ers, the V+ and V– pins may be paralleled into common
capacitors.
higher voltages will not damage the device if the over-
drive is moderately current limited. Short circuits on one
output can load the power supply generator and may
disrupt the signal levels of the other outputs. The driver
outputs are protected against ESD to ±10kV for human
body model discharges.
REC2 IN, REC1 IN (Pins 8, 13): Receiver Inputs. These
pinsacceptRS232levelsignals(±30V)intoaprotected5k
terminating resistor. The receiver inputs are protected
against ESD to ±10kV for human body model discharges.
Each receiver provides 0.4V of hysteresis for noise immu-
nity. Open receiver inputs assume a logic low state.
REC2OUT, REC1OUT(Pins9, 12):ReceiverOutputswith
TTL/CMOS Voltage Levels. Outputs are fully short-circuit
protected to ground or VCC with the power ON or OFF.
TR2 IN, TR1 IN (Pins 10, 11): RS232 Driver Input Pins.
These inputs are TTL/CMOS compatible. Inputs should
not be allowed to float. Tie unused inputs to VCC.
TR2 OUT, TR1 OUT (Pin 7, 14): Driver Outputs at RS232
Voltage Levels. Driver output swing meets RS232 levels
for loads up to 3k. Slew rates are controlled for lightly
loaded lines. Output current capability is sufficient for
load conditions up to 2500pF. Outputs are in a high
impedance state when VCC = 0V. Outputs are fully short-
circuit protected from V– + 25V to V+ – 25V. Applying
GND (Pin 15): Ground Pin.
VCC (Pin 16): 5V Input Supply Pin. This pin should be
decoupled with a 0.1µF ceramic capacitor close to the
package pin. Insufficient supply bypassing can result in
lowoutputdrivelevelsanderraticchargepumpoperation.
U
ESD PROTECTIO
ESD Test Circuit
The RS232 line inputs of the LT1381 have on-chip protec-
tion from ESD transients up to ±10kV. The protection
structures act to divert the static discharge safely to
systemground. InorderfortheESDprotectiontofunction
effectively, thepowersupplyandgroundpinsofthecircuit
must be connected to ground through low impedances.
Thepowersupplydecouplingcapacitorsandchargepump
storage capacitors provide this low impedance in normal
application of the circuit. The only constraint is that low
ESR capacitors must be used for bypassing and charge
storage. ESD testing must be done with pins VCC, V+, V–
and GND shorted to ground or connected with low ESR
capacitors.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
5V V
C1
CC
0.1µF
+
+
+
LT1381
+
0.1µF
+
0.1µF
V
GND
TR1 OUT
–
+
–
C1
C2
C2
RS232
LINE PINS
REC1 IN
PROTECTED
TO ±10kV
0.1µF
0.1µF
REC1 OUT
TR1 IN
TR2 IN
+
–
V
TR2 OUT
REC2 IN
RS232
LINE PINS
PROTECTED
TO ±10kV
REC2 OUT
LT1381 • ESD TC
5
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
