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LPC43S70FET100 PDF预览

LPC43S70FET100

更新时间: 2024-04-09 18:58:45
品牌 Logo 应用领域
恩智浦 - NXP 静态存储器
页数 文件大小 规格书
157页 6922K
描述
32-Bit Arm® Cortex®-M4 + 2 X M0 MCU; 282 KB SRAM; Ethernet; Two HS USB...

LPC43S70FET100 数据手册

 浏览型号LPC43S70FET100的Datasheet PDF文件第4页浏览型号LPC43S70FET100的Datasheet PDF文件第5页浏览型号LPC43S70FET100的Datasheet PDF文件第6页浏览型号LPC43S70FET100的Datasheet PDF文件第8页浏览型号LPC43S70FET100的Datasheet PDF文件第9页浏览型号LPC43S70FET100的Datasheet PDF文件第10页 
LPC43S70  
NXP Semiconductors  
32-bit ARM Cortex-M4/M0 microcontroller  
6. Pinning information  
6.1 Pinning  
LPC43S70FET256  
ball A1  
index area  
ball A1  
index area  
LPC43S70FET100  
2
4
6
8
10 12 14 16  
11 13 15  
1
3
5
7
9
1
2
3
4
5
6
7
8
9 10  
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
A
B
C
D
E
F
G
H
J
K
aaa-016618  
aaa-016396  
Transparent top view  
Transparent top view  
Fig 2. Pin configuration LBGA256 package  
Fig 3. Pin configuration TFBGA100 package  
6.2 Pin description  
On the LPC43S70, digital pins are grouped into 16 ports, named P0 to P9 and PA to PF,  
with up to 20 pins used per port. Each digital pin can support up to eight different digital  
functions, including General Purpose I/O (GPIO), selectable through the System  
Configuration Unit (SCU) registers. The pin name is not indicative of the GPIO port  
assigned to it.  
Not all functions listed in Table 3 are available on all packages. See Table 2 for availability  
of USB0, USB1, Ethernet, and LCD functions.  
LPC43S70  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2020. All rights reserved.  
Product data sheet  
Rev. 1.3 — 10 January 2020  
7 of 157  

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