Electrical Characteristics (Continued)
Limits in standard typeface are for Tj = 25˚C, and limits in boldface type apply over the full operating junction temperature
range. Unless otherwise specified, VIN = VO(NOM) + 1V, (Note 16), COUT = 1µF, IOUT = 1mA, CIN = 1µF, VSD1 = VSD2 = VIN
.
LP2966IMM (Note 5)
Typ (Note
Symbol
Tsh(h)
Parameter
Conditions
Unit
4)
Min
Max
Thermal Shutdown
Hysteresis
25
˚C
Shutdown Input
VSDT
Shutdown Threshold
(Note 15)
Output = Low
0
0.1
V
Output = High
IL = 100 mA
VIN
20
VIN - 0.1
TdOFF
TdON
ISD
Turn-off Delay (Note
17)
µsec
Turn-on Delay (Note
17)
IL = 100 mA
25
µsec
nA
SD Input Current
VSD = VIN
VSD = 0 V
1
1
Error Flag Comparators
VT
Threshold (output
10
5
5
2
16
8
%
%
goes high to low)
(Note 11)
(Note 11)
VTH
Threshold Hysteresis
VERR(Sat)
IEF(leak)
Error Flag Saturation IFsink = 100µA
Error Flag Pin
0.015
1
0.1
V
nA
Leakage Current
I(EFsink)
Error Flag Pin Sink
Current
1
mA
AC Parameters
PSRR
Ripple Rejection
VIN = VOUT + 1V, f =
60
40
120Hz, VOUT = 3.3V
VIN = VOUT + 0.3V, f =
120Hz, VOUT = 3.3V
dB
√
ρn(1/f)
Output Noise Density f =120Hz
1
µV/ Hz
en
Output Noise Voltage BW = 10Hz − 100kHz,
150
(rms)
COUT = 10µF
µV(rms)
BW = 300Hz − 300kHz,
COUT = 10µF
100
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The device in the surface-mount package must be derated at
θ
= 235˚C/W, junction-to-ambient. Please refer to the applications section on maximum current capability for further information. The device has internal thermal
jA
protection.
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 4: : Typical numbers are at 25˚C and represent the most likely parametric norm.
Note 5: : Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Averaging Outgoing Quality Level (AOQL).
Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2966 output must be diode-clamped to ground.
Note 7: The output PMOS structure contains a diode between the V and V
terminals that is normally reverse-biased. Reversing the polarity from V and V
IN OUT
IN
OUT
will turn on this diode.
Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in input line voltage.
Note 9: Output voltage load regulation is defined as the change in output voltage from the nominal value when the load current changes from 1mA to 100mA.
Note 10: Output voltage cross regulation is defined as the percentage change in the output voltage from the nominal value at one output when the load current
changes from 1mA to full load in the other output. This is an important parameter in multiple output regulators. The specification for ∆V /∆I
is equal to the
O1 OUT2
specification for ∆V /∆I
.
O2 OUT1
Note 11: Error Flag threshold and hysteresis are specified as the percentage below the regulated output voltage.
Note 12: Dropout voltage is defined as the input to output differential at which the output voltage drops 100mV below the nominal value. Drop-out voltage
specification applies only to output voltages greater than 2.7V. For output voltages below 2.7V, the drop-out voltage is nothing but the input to output differential, since
the minimum input voltage is 2.7V.
5
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