Datasheet > LNK3205G-TL

LNK3205G-TL

更新时间： 2024-01-23 13:31:01

品牌	Logo	应用领域
帕沃英蒂格盛 - POWERINT		开关光电二极管
页数	文件大小	规格书
22页	1875K
描述
IC OFFLN CONV MULT TOP 8SMD

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技术参数
数据手册

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LNK3205G-TL 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	SOP,
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	14 weeks
风险等级：	1.74	模拟集成电路 - 其他类型：	SWITCHING REGULATOR
JESD-30 代码：	R-PDSO-G7	长度：	9.44 mm
功能数量：	1	端子数量：	7
最高工作温度：	125 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	座面最大高度：	3.98 mm
表面贴装：	YES	切换器配置：	BUCK-BOOST
温度等级：	AUTOMOTIVE	端子形式：	GULL WING
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	6.35 mm
Base Number Matches：	1

LNK3205G-TL 数据手册

LNK3202/3204-6

Topology

Basic Circuit Schematic

Key Features

1. Output referenced to input

2. Positive output (V_O) with respect to +V_IN

3. Step up/down – V_O> V_INor V_O< V_IN

4. Optocoupler feedback

Low-Side

LinkSwitch-TN2

V_IN

V_O

Buck-Boost –

Optocoupler

Feedback

- Accuracy only limited by reference choice

- Low cost non-safety rated optocoupler

- No pre-load required

BP/M

5. Fail-safe – output is not subjected to input

voltage if the internal power MOSFET fails

6. Minimum no-load consumption

PI-7848-031616

Table 3 (cont). Common Circuit Conﬁgurations using LinkSwitch-TN2.

Figures 9a, 9b and 9c are printed circuit board layout design

examples for the circuit schematic shown in Figure 8. The loop

formed between the LinkSwitch-TN2, inductor (L1), freewheeling

diode (D1), and output capacitor (C2) should be kept as small as

possible. The BYPASS pin capacitor C1 should be located physically

close to the SOURCE (S) and BYPASS (BP) pins. To minimize direct

coupling from switching nodes, the LinkSwitch-TN2 should be placed

away from AC input lines. It may be advantageous to place capacitors

C4 and C5 in-between LinkSwitch-TN2 and the AC input. The second

rectiﬁer diode D4 is optional, but may be included for better EMI

performance and higher line surge withstand capability.

LinkSwitch-TN2 Layout Considerations

In the buck or buck-boost converter conﬁguration, since the SOURCE

pins in LinkSwitch-TN2 are switching nodes, the copper area

connected to SOURCE should be minimized to minimize EMI within

the thermal constraints of the design.

In the boost conﬁguration, since the SOURCE pins are tied to DC

return, the copper area connected to SOURCE can be maximized to

improve heat sinking.

Figure 9a. Recommended Printed Circuit Layout for LinkSwitch-TN2 using P Package.

Rev. F 01/17

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