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LMX2332LTMX PDF预览

LMX2332LTMX

更新时间： 2024-01-06 21:17:38
品牌 Logo 应用领域
美国国家半导体 - NSC 射频光电二极管个人通信信息通信管理
页数 文件大小 规格书
23页 560K
描述
PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications

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LMX2332LTMX 技术参数

生命周期：Contact Manufacturer包装说明：TSSOP,
Reach Compliance Code：unknown风险等级：5.7
其他特性：DUAL MODULUS PRESCALER (RF): 64/65 OR 128/129 AND DUAL MODULUS PRESCALER (IF): 8/9 OR 16/17模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZER
JESD-30 代码：R-PDSO-G20长度：6.5 mm
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
座面最大高度：1.1 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：4.4 mm
Base Number Matches：1

LMX2332LTMX 数据手册

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Pin Descriptions  
Pin No.  
Pin No.  
Pin No.  
LMX233XLSLD LMX233XLSLB LMX233XLTM  
Pin  
24-pin CSP 20-pin TSSOP Name  
I/O  
Description  
20-pin Thin  
CSP Package  
20  
Package  
Package  
24  
1
VCC  
1
—
Power supply voltage input for RF analog and RF digital circuits.  
Input may range from 2.7V to 5.5V. VCC1 must equal VCC2.  
Bypass capacitors should be placed as close as possible to this  
pin and be connected directly to the ground plane.  
1
2
2
3
2
3
VP1  
—
O
Power Supply for RF charge pump. Must be ≥ VCC.  
Do RF  
Internal charge pump output. For connection to a loop filter for  
driving the input of an external VCO.  
3
4
5
4
5
6
4
5
6
GND  
—
Ground for RF digital circuitry.  
fIN RF  
fIN RF  
I
I
RF prescaler input. Small signal input from the VCO.  
RF prescaler complementary input. A bypass capacitor should  
be placed as close as possible to this pin and be connected  
directly to the ground plane. Capacitor is optional with some loss  
of sensitivity.  
6
7
7
8
7
8
GND  
—
I
Ground for RF analog circuitry.  
OSCin  
Oscillator input. The input has a VCC/2 input threshold and can  
be driven from an external CMOS or TTL logic gate.  
™
8
9
10  
11  
9
GND  
FoLD  
—
O
Ground for IF digital, MICROWIRE , FoLD, and oscillator  
circuits.  
10  
Multiplexed output of the RF/IF programmable or reference  
dividers, RF/IF lock detect signals and Fastlock mode. CMOS  
output (see Programmable Modes).  
10  
12  
11  
Clock  
I
High impedance CMOS Clock input. Data for the various  
counters is clocked in on the rising edge, into the 22-bit shift  
register.  
11  
12  
14  
15  
12  
13  
Data  
LE  
I
I
Binary serial data input. Data entered MSB first. The last two bits  
are the control bits. High impedance CMOS input.  
Load enable high impedance CMOS input. When LE goes HIGH,  
data stored in the shift registers is loaded into one of the 4  
appropriate latches (control bit dependent).  
13  
14  
16  
17  
14  
15  
GND  
fIN IF  
—
I
Ground for IF analog circuitry.  
IF prescaler complementary input. A bypass capacitor should be  
placed as close as possible to this pin and be connected directly  
to the ground plane. Capacitor is optional with some loss of  
sensitivity.  
15  
16  
17  
18  
19  
20  
16  
17  
18  
fIN RF  
GND  
Do IF  
I
IF prescaler input. Small signal input from the VCO.  
Ground for IF digital, MICROWIRE, FoLD, and oscillator circuits.  
IF charge pump output. For connection to a loop filter for driving  
the input of an external VCO.  
—
O
18  
19  
22  
23  
19  
20  
VP2  
—
—
Power Supply for IF charge pump. Must be ≥ VCC.  
VCC2  
Power supply voltage input for IF analog, IF digital,  
MICROWIRE, FoLD, and oscillator circuits. Input may range from  
2.7V to 5.5V. VCC2 must equal VCC1. Bypass capacitors should  
be placed as close as possible to this pin and be connected  
directly to the ground plane.  
X
1, 9, 13, 21  
X
NC  
—
No connect.  
3
www.national.com  
1234567...23

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