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LMR38020

更新时间： 2022-05-14 22:22:26
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德州仪器 - TI /
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32页 1436K
描述
LMR38020 SIMPLE SWITCHER® 4.2-V to 80-V, 2-A Synchronous Buck Converter with 40-μA IQ

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LMR38020 数据手册

 浏览型号LMR38020的Datasheet PDF文件第1页浏览型号LMR38020的Datasheet PDF文件第2页浏览型号LMR38020的Datasheet PDF文件第4页浏览型号LMR38020的Datasheet PDF文件第5页浏览型号LMR38020的Datasheet PDF文件第6页浏览型号LMR38020的Datasheet PDF文件第7页 
LMR38020  
www.ti.com  
SNVSC40B – AUGUST 2021 – REVISED NOVEMBER 2021  
5 Device Comparison Table  
ORDERABLE PART NUMBER  
CURRENT  
FPWM  
No  
SPREAD SPECTRUM  
LMR38020SDDAR  
2 A  
2 A  
2 A  
1 A  
1 A  
1 A  
Yes  
No  
LMR38020FDDAR(1)  
LMR38020FSDDAR(1)  
LMR38010SDDAR(1)  
LMR38010FDDAR(1)  
LMR38010FSDDAR(1)  
Yes  
Yes  
No  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
(1) In Preview  
6 Pin Configuration and Functions  
GND  
EN  
1
2
3
4
8
7
6
5
SW  
BOOT  
PG  
EP  
VIN  
RT/SYNC  
FB  
Figure 6-1. 8-Pin SO PowerPAD DDA Package (Top View)  
Table 6-1. Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
GND  
EN  
NO.  
1
Power and analog ground terminal. All electrical parameters are measured with respect to this pin.  
Connect a high-quality bypass capacitor directly to this pin and VIN with short and wide traces.  
G
A
P
2
Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN. Do not float.  
Input supply to the regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin  
and GND with short and wide traces.  
VIN  
3
Resistor timing or external clock input. An internal amplifier holds this pin at a fixed voltage when  
using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL  
upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal  
amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges  
stop, the internal amplifier is re-enabled and the operating mode returns to frequency programming  
by resistor.  
RT/SYNC  
4
A
Feedback input to the regulator. Connect to tap point of the feedback voltage divider. Do not float. Do  
not ground.  
FB  
5
6
A
A
Open-drain power-good flag output. Connect to a suitable voltage supply through a current limiting  
resistor. High = power OK, low = power bad. The flag pulls low when EN = low. Can be left open  
when not used.  
PG  
Bootstrap supply voltage for the internal high-side driver. Connect a high-quality 100-nF capacitor  
from this pin to the SW pin.  
BOOT  
SW  
7
8
P
P
Regulator switch node. Connect to a power inductor.  
THERMAL  
PAD  
EP  
Thermal Connect to system ground. Connect to GND and CIN with short, wide traces.  
Copyright © 2021 Texas Instruments Incorporated  
Submit Document Feedback  
3
Product Folder Links: LMR38020  
 
 
 
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