LMK5B12204
ZHCSLM0A –MAY 2020 –REVISED JANUARY 2021
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Table of Contents
9.4 Device Functional Modes..........................................53
9.5 Programming............................................................ 59
10 Application and Implementation................................67
10.1 Application Information........................................... 67
10.2 Typical Application.................................................. 70
10.3 Do's and Don'ts.......................................................75
11 Power Supply Recommendations..............................76
11.1 Power Supply Bypassing........................................ 76
11.2 Device Current and Power Consumption................76
12 Layout...........................................................................78
12.1 Layout Guidelines................................................... 78
12.2 Layout Example...................................................... 78
12.3 Thermal Reliability.................................................. 79
13 Device and Documentation Support..........................80
13.1 Device Support....................................................... 80
13.2 接收文档更新通知................................................... 80
13.3 支持资源..................................................................80
13.4 Trademarks.............................................................80
13.5 静电放电警告.......................................................... 80
13.6 术语表..................................................................... 80
14 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 说明(续).........................................................................3
6 Pin Configuration and Functions...................................4
6.1 Device Start-Up Modes...............................................7
7 Specifications.................................................................. 8
7.1 Absolute Maximum Ratings ....................................... 8
7.2 ESD Ratings .............................................................. 8
7.3 Recommended Operating Conditions ........................8
7.4 Thermal Information: 4-Layer JEDEC Standard
PCB ..............................................................................9
7.5 Thermal Information: 10-Layer Custom PCB .............9
7.6 Electrical Characteristics ............................................9
7.7 Timing Diagrams.......................................................16
7.8 Typical Characteristics..............................................18
8 Parameter Measurement Information..........................21
8.1 Output Clock Test Configurations............................. 21
9 Detailed Description......................................................23
9.1 Overview...................................................................23
9.2 Functional Block Diagram.........................................24
9.3 Feature Description...................................................28
Information.................................................................... 80
14.1 Package Option Addendum....................................81
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision * (May 2020) to Revision A (January 2021)
Page
• 将155.52MHz 时的典型RMS 抖动从130fs 更改为125fs................................................................................. 1
• Changed the maximum APLL1 PFD frequency from 50 MHz to 80 MHz...........................................................9
• Changed the maximum AC-LVDS output frequency from 800 MHz to 1250 MHz............................................. 9
• Changed the maximum AC-CML output frequency from 800 MHz to 1250 MHz...............................................9
• Changed the maximum AC-LVPECL output frequency from 800 MHz to 1250 MHz......................................... 9
• Changed the output format in RMS jitter test conditions from AC-DIFF to AC-LVPECL.................................... 9
• Changed the max RMS jitter for 312.5 MHz from 100 fs to 80 fs....................................................................... 9
• Changed the max RMS jitter for 156.25 MHz from 100 fs to 90 fs..................................................................... 9
• Changed the max RMS jitter for 153.6 MHz from 250 fs to 200 fs..................................................................... 9
• Changed the max RMS jitter for 155.52 MHz from 250 fs to 200 fs................................................................... 9
• Added typical performance plot for output voltage swing vs. output frequency................................................18
• Added descriptions for reference frequency monitoring................................................................................... 36
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