Electrical Characteristics VDD = 3V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA
25˚C. (Continued)
=
LM4990
Units
(Limits)
Symbol
Parameter
Conditions
Typical
(Note 6)
425
Limit
(Notes 7, 9)
Output Power (8Ω)
(4Ω)
THD+N = 1% (max); f = 1kHz
THD+N = 1% (max); f = 1kHz
mW
mW
ms
%
Po
600
TWU
Wake-up time
75
THD+N+N Total Harmonic Distortion+Noise
Po = 0.25Wrms; f = 1kHz
Vripple = 200mV sine p-p
Input terminated with 10Ω
0.1
62 (f =
PSRR
Power Supply Rejection Ratio
217Hz)
55
dB (min)
68 (f = 1kHz)
Electrical Characteristics VDD = 2.6V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.
LM4990
Units
(Limits)
Symbol
Parameter
Conditions
Typical
(Note 6)
2.0
Limit
(Notes 7, 9)
VIN = 0V, Io = 0A, No Load
VIN = 0V, Io = 0A, 8Ω Load
VSD = VSD Mode (Note 8)
VSD MODE = VDD
mA
IDD
Quiescent Power Supply Current
3.0
mA
ISD
Shutdown Current
0.1
µA
VSDIH
VSDIL
VSDIH
VSDIL
VOS
Shutdown Voltage Input High
Shutdown Voltage Input Low
Shutdown Voltage Input High
Shutdown Voltage Input Low
Output Offset Voltage
1.0
V
VSD MODE = VDD
0.9
V
V
VSD MODE = GND
1.2
VSD MODE = GND
1.0
V
5
50
9.7
7.0
mV (max)
kΩ (max)
kΩ (min)
ROUT
Resistor Output to GND (Note 10)
8.5
Po
Output Power ( 8Ω )
( 4Ω )
THD+N = 1% (max); f = 1kHz
THD+N = 1% (max); f = 1kHz
300
400
70
mW
TWU
Wake-up time
ms
%
THD+N+N Total Harmonic Distortion+Noise
Po = 0.15Wrms; f = 1kHz
Vripple = 200mV sine p-p
Input terminated with 10Ω
0.1
51 (f =
PSRR Power Supply Rejection Ratio
217Hz)
dB
51 (f = 1kHz)
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4990, see power derating
DMAX
JMAX A JA
curves for additional information.
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 5: Machine Model, 220pF – 240pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: R
is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors.
ROUT
Note 11: If the product is in Shutdown mode and V exceeds 6V (to a max of 8V V ), then most of the excess current will flow through the ESD protection circuits.
DD
DD
If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when V is greater than 5.5V and less than
DD
6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 12: Maximum power dissipation in the device (P
) occurs at an output power level significantly below full output power. P
can be calculated using
DMAX
DMAX
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.
5
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