Electrical Characteristics VDD = 3V (Notes 1, 2, 8)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA
25˚C. (Continued)
=
LM4890
Units
(Limits)
Symbol
Po
Parameter
Output Power (8Ω)
Conditions
Typical
(Note 6)
0.31
Limit
(Notes 7, 9)
0.28
THD = 1% (max); f = 1kHz
W
TSD
Thermal Shutdown Temperature
150
˚C(min)
˚C(max)
%
170
190
THD+N
PSRR
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
(Note 14)
Po = 0.15Wrms; f = 1kHz
Vripple = 200mV sine p-p
Input terminated with 10 ohms to
ground
0.1
56 (f =
45
dB(min)
217Hz)
62 (f = 1kHz)
Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4890
Units
Symbol
IDD
Parameter
Conditions
Typical
(Note 6)
2.6
Limit
(Limits)
(Notes 7, 9)
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A, No Load
VSHUTDOWN = 0V
mA (max)
ISD
P0
0.1
µA (max)
Output Power (8Ω)
Output Power (4Ω)
THD = 1% (max); f = 1 kHz
THD = 1% (max); f = 1 kHz
Po = 0.1Wrms; f = 1kHz
Vripple = 200mV sine p-p
Input Terminated with 10 ohms to
ground
0.2
W
W
%
0.22
THD+N
PSRR
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
(Note 14)
0.08
44 (f =
217Hz)
44 (f = 1kHz)
dB
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4890, see power derating
DMAX
JMAX A JA
curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: ROUT is measured from each of the output pins to ground. This value represents the parallel combination of the 10k ohm output resistors and the two 20k
ohm resistors.
Note 11: If the product is in shutdown mode and V exceeds 6V (to a max of 8V V ), then most of the excess current will flow through the ESD protection circuits.
DD
DD
If the source impedance limits the current to a max of 10 ma, then the part will be protected. If the part is enabled when V is greater than 5.5V and less than 6.5V,
DD
no damage will occur, although operational life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 12: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. All bumps must be connected to achieve
specified thermal resistance.
Note 13: Maximum power dissipation (P
) in the device occurs at an output power level significantly below full output power. P
can be calculated using
DMAX
DMAX
Equation 1 shown in the Application section. It may also be obtained from the power dissipation graphs.
Note 14: PSRR is a function of system gain. Specifications apply to the circuit in Figure 1 where A = 2. Higher system gains will reduce PSRR value by the amount
V
of gain increase. A system gain of 10 represents a gain increase of 14dB. PSRR will be reduced by 14dB and applies to all operating voltages.
5
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