Datasheet > LAN9352

LAN9352

更新时间： 2023-12-06 20:11:25

品牌	Logo	应用领域
美国微芯 - MICROCHIP		局域网
页数	文件大小	规格书
600页	5516K
描述
Microchip's LAN9352/LAN9352i is a high-performance, small-footprint, full-featured 2-port managed

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数据手册

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LAN9352 数据手册

LAN9352

TABLE 1-1:

GENERAL TERMS (CONTINUED)

Term

Description

NRZI

Non Return to Zero Inverted. This encoding method inverts the signal for a “1” and

leaves the signal unchanged for a “0”

N/A

Not Applicable

No Connect

OUI

Organizationally Unique Identifier

Refers to data output from the device to the host

Parallel In Serial Out

Outbound

PISO

PLL

Phase Locked Loop

PTP

Precision Time Protocol

RESERVED

Refers to a reserved bit field or address. Unless otherwise noted, reserved bits must

always be zero for write operations. Unless otherwise noted, values are not guaran-

teed when reading reserved bits. Unless otherwise noted, do not read or write to

reserved addresses.

RTC

Real-Time Clock

Source Address

SFD

Start of Frame Delimiter - The 8-bit value indicating the end of the preamble of an

Ethernet frame.

SIPO

SMI

Serial In Parallel Out

Serial Management Interface

SQE

SSD

Signal Quality Error (also known as “heartbeat”)

Start of Stream Delimiter

UDP

UUID

WORD

User Datagram Protocol - A connectionless protocol run on top of IP networks

Universally Unique IDentifier

16 bits

 2023 Microchip Technology Inc. and its subsidiaries

DS00001923B-page 5

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