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KS88C0716 PDF预览

KS88C0716

更新时间: 2024-02-18 17:55:10
品牌 Logo 应用领域
三星 - SAMSUNG 微控制器
页数 文件大小 规格书
30页 229K
描述
SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-prog

KS88C0716 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP,针数:64
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.84具有ADC:NO
地址总线宽度:16位大小:8
最大时钟频率:12 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:R-PQFP-G64长度:20 mm
I/O 线路数量:56端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:RECTANGULAR
封装形式:FLATPACK认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:3 mm
最大供电电压:5.5 V最小供电电压:2.7 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1 mm
端子位置:QUAD宽度:14 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

KS88C0716 数据手册

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KS88C0716/P0716  
PRODUCT OVERVIEW  
Table 1-2. KS88C0716 Pin Descriptions (64-SDIP)  
Pin  
Name  
Pin  
Type  
Pin  
Description  
Circuit  
Number  
SDIP Pin  
Number  
Share  
Pins  
P0.0–P0.7  
I/O  
I/O port with nibble-programmable pins;  
Input or push-pull, open-drain output and  
software assignable pull-ups; also  
configurable as external interface address  
lines A8-A15.  
E
1–7, 64  
A8–A15  
P1.0–P1.7  
I/O  
I/O  
Same general characteristics as port 0; also  
configurable as external interface  
address/data lines AD0–AD7.  
E
56–63  
40–47  
AD0–AD7  
P2.0–P2.3  
P2.4–P2.7  
I/O port with bit-programmable pins; Input  
or push-pull output. Lower nibble pins 0–3  
are configurable for external interface  
signals; upper nibble pins 4–7 are bit-  
D-1 (lower  
nibble);  
AS, DS,  
DM, R/W  
D-1 (upper  
INT0–INT3,  
WAIT  
programmable for external interrupts INT0– nibble; with  
INT3. P2.4 can also be used for external  
input.  
noise filter)  
P3.0–P3.7  
P4.0–P4.7  
I/O  
I/O  
I/O port with bit-programmable pins; Input  
or push-pull output. Alternate functions  
include software-selectable UART transmit  
and receive on pins 3.7 and 3.6, timer B  
and timer A outputs at pins 3.5 and 3.4, and  
timer D and C clock inputs at pins 3.1 and  
3.0.  
D-1  
24– 31  
TCCK,  
TDCK, TA,  
TB, TxD,  
RxD  
I/O port with bit-programmable pins; Input  
or push-pull output; software-assignable  
pull-ups. Alternate functions include  
D
8–15  
INT4–  
INT11,  
TCG, TDG  
(with noise  
filter)  
external interrupt inputs INT4-INT11 (with  
interrupt enable and pending control) and  
timer C and D gate input at P4.0 and P4.1.  
P5.0–P5.7  
P6.0–P6.7  
I/O  
O
I/O port with nibble-programmable pins;  
Input or push-pull, open-drain output;  
software-assignable pull-ups.  
E
21, 22,  
50–55  
Output port with nibble-programmable pins;  
push-pull, open-drain output; software-  
assignable pull-ups.  
E-8  
32–39  
RxD  
I/O  
I/O  
I/O  
I/O  
I/O  
Bi-directional serial data input pin  
Serial data output pin  
24  
P3.7  
TxD  
25  
P3.6  
TA, TB  
Timer A and B output pins  
4
27, 26  
30, 31  
40–43  
P3.4, P3.5  
P3.0, P3.1  
P2.4–P2.7  
TCCK, TDCK  
INT0–INT3  
Timer C and D external clock input pins  
D-1  
External interrupts. I/O pin 2.4 (share pin  
with INT0) is also configurable as a WAIT  
signal input pin for the external interface.  
D-1  
(with noise  
filter)  
1-7  

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