K4F170411C, K4F160411C
K4F170412C, K4F160412C
CMOS DRAM
4M x 4Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-50 or -60), power con-
sumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.
This 4Mx4 Fast Page Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as main memory for high level computer, microcomputer and personal computer.
FEATURES
• Part Identification
• Fast Page Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
- K4F170411C-B(F) (5V, 4K Ref.)
• Self-refresh capability (L-ver only)
- K4F160411C-B(F) (5V, 2K Ref.)
• Fast parallel test mode capability
- K4F170412C-B(F) (3.3V, 4K Ref.)
- K4F160412C-B(F) (3.3V, 2K Ref.)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Active Power Dissipation
Unit : mW
5V
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)
3.3V
Speed
4K
2K
396
360
4K
2K
-50
-60
324
288
495
440
605
550
FUNCTIONAL BLOCK DIAGRAM
• Refresh Cycles
Part
NO.
Refresh Refresh period
cycle
VCC
5V
RAS
CAS
W
Vcc
Vss
Control
Clocks
Nor-
L-ver
VBB Generator
K4F170411C
4K
2K
64ms
K4F170412C 3.3V
K4F160411C 5V
Data in
128ms
Buffer
Row Decoder
Refresh Timer
Refresh Control
Refresh Counter
32ms
K4F160412C 3.3V
DQ0
to
DQ3
Memory Array
4,194,304 x 4
Cells
• Performance Range
A0-A11
(A0 - A10)*1
A0 - A9
Row Address Buffer
Col. Address Buffer
Speed
-50
Remark
tRAC
50ns
60ns
tCAC
tRC
tPC
Data out
Buffer
13ns
90ns
35ns 5V/3.3V
Column Decoder
OE
(A0 - A10)*1
-60
15ns 110ns 40ns 5V/3.3V
Note) *1 : 2K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.