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K3P7C1000B-TC PDF预览

K3P7C1000B-TC

更新时间: 2024-02-19 21:28:55
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM
页数 文件大小 规格书
5页 87K
描述
MASK ROM

K3P7C1000B-TC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.92Base Number Matches:1

K3P7C1000B-TC 数据手册

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Preliminary Information  
K3P7C1000B-TC  
CMOS MASK ROM  
64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
8,388,608 x 8(byte mode)  
4,194,304 x 16(word mode)  
· Fast access time  
Random Access : 100ns(Max.)  
Page Access  
8 Words / 16 Bytes page access  
· Supply voltage : single +5V  
· Current consumption  
The K3P7C1000B-TC is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 8,388,608 x 8 bit(byte mode) or as  
4,194,304 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
This device includes page read mode function, page read mode  
allows 8 words (or 16 bytes) of data to read fast in the same  
page, CE and A3 ~ A21 should not be changed.  
: 30ns(Max.)  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Operating : 150mA(Max.)  
Standby : 100mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
· Package  
-. K3P7C1000B-TC : 44-TSOP2-400  
The K3P7C1000B-TC is packaged in a 44-TSOP2.  
PIN CONFIGURATION  
FUNCTIONAL BLOCK DIAGRAM  
A21  
X
MEMORY CELL  
MATRIX  
(4,194,304x16/  
8,388,608x8)  
A21  
A18  
A20  
A19  
A8  
1
2
44  
43  
42  
41  
BUFFERS  
AND  
DECODER  
.
.
.
.
.
.
.
.
A17  
A7  
3
4
A9  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
5
40 A10  
6
A11  
A12  
39  
38  
Y
SENSE AMP.  
7
BUFFERS  
AND  
DECODER  
8
37 A13  
DATA OUT  
BUFFERS  
A14  
36  
9
A3  
A15  
35  
10  
11  
A0~A2  
A-1  
A16  
34  
33  
TSOP2  
CE 12  
BHE  
.
.
.
VSS  
13  
32 VSS  
OE  
Q0  
Q8  
Q1  
Q9  
14  
15  
16  
17  
18  
19  
Q15/A-1  
31  
30  
29  
28  
27  
26  
25  
24  
23  
CE  
Q7  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
Q14  
Q6  
BHE  
Q13  
Q5  
Q2  
Q10 20  
Q12  
Q4  
Pin Name  
A0 - A2  
Pin Function  
Q3  
21  
22  
Page Address Inputs  
Address Inputs  
Data Outputs  
Q11  
VCC  
A3 - A21  
Q0 - Q14  
Q15 /A-1  
K3P7C1000B-TC  
Output 15(Word mode)/  
LSB Address(Byte mode)  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power ( +5V)  
Ground  
OE  
VCC  
VSS  

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