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JL82576EB/SLJBH PDF预览

JL82576EB/SLJBH

更新时间: 2024-02-05 05:58:13
品牌 Logo 应用领域
英特尔 - INTEL 通信时钟局域网PC外围集成电路
页数 文件大小 规格书
956页 7088K
描述
2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PBGA576, 25 X 25 MM, 1 MM PITCH, FCBGA-576

JL82576EB/SLJBH 技术参数

是否Rohs认证: 符合生命周期:Lifetime Buy
零件包装代码:BGA包装说明:25 X 25 MM, 1 MM PITCH, FCBGA-576
针数:576Reach Compliance Code:compliant
风险等级:5.75地址总线宽度:
边界扫描:YES总线兼容性:PCI
最大时钟频率:25 MHz通信协议:ASYNC, BIT; I2C
外部数据总线宽度:JESD-30 代码:S-PBGA-B576
长度:25 mm低功率模式:YES
串行 I/O 数:2端子数量:576
最高工作温度:55 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA576,24X24,40封装形状:SQUARE
封装形式:GRID ARRAY电源:1,1.8,3.3 V
认证状态:Not Qualified子类别:Serial IO/Communication Controllers
标称供电电压:1 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:25 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LANBase Number Matches:1

JL82576EB/SLJBH 数据手册

 浏览型号JL82576EB/SLJBH的Datasheet PDF文件第1页浏览型号JL82576EB/SLJBH的Datasheet PDF文件第2页浏览型号JL82576EB/SLJBH的Datasheet PDF文件第3页浏览型号JL82576EB/SLJBH的Datasheet PDF文件第5页浏览型号JL82576EB/SLJBH的Datasheet PDF文件第6页浏览型号JL82576EB/SLJBH的Datasheet PDF文件第7页 
Intel® 82576EB GbE Controller — Revisions  
Revision  
Date  
Comments  
Section 4.4, Device Disable - The following phrase in the section has been changed:  
The EEPROM "Power Down Enable" bit (Section 6.2.7) enables device disable mode  
(hardware default is that the mode is disabled).  
Table 4-5, 82576 Reset Effects - Per Function Resets - Table updated. See the  
entries on PCI Configuration registers and the associated footnotes.  
Section 4.2.1.6.3, VF Software Reset - Replaced VFCTRL with VTCTRL (corrects a  
typo). Added information that indicates what happens when VTCTRL.RST is set.  
Setting VTCTRL.RST resets interrupts and queue enable bits. Other VF registers are  
not reset.  
Section 5.0, Power Management updated for clarity.  
Section 6.10.7.1, iSCSI Module Structure - Description of structure updated.  
Multiple errors were corrected  
Section 7.1.3.1, Host Buffers - Text added. For advanced descriptor usage, the  
SRRCTL.BSIZEHEADER field is used to define the size of the buffers allocated to  
headers. The maximum buffer size supported is 960 bytes..  
Section 8.2.4, MDI Control Register - MDIC (0x00020; R/W) - Description of bit 31  
corrected.  
Section 8.10.2, Split and Replication Receive Control - SRRCTL (0x0C00C + 0x40*n  
[n=0...15]; R/W). Maximum 960 bytes now indicated for SRRCTL.BSIZEHEADER.  
Section 10.4.4.3, RMCP Filtering - Title of section updated.  
Section 10.5.10.1.4, Force TCO Command and Section 10.6.2.13.1, Perform Intel  
TCO Reset Command (Intel Command 0x22) - Added description of RESET_MGMT  
bit.  
Section 10.5.12, Example Configuration Steps - Added pseudocode describing the  
setup of common filtering configurations.  
Table 10-35, Command Summary - Commands added, see:  
0x02 0x67/68 Set EtherType Filter/Packet Add. Ext. Filter  
0x03 0x67/68 Get EtherType Filter/Packet Add. Ext. Filter  
Section 10.5.10.2.1, Receive TCO LAN Packet Transaction. Description of packet  
structure added.  
Section 10.6.2.6.19, Set Intel Filters - Packet Addition Extended Decision Filter  
Command (Intel Command 0x02, Filter parameter 0x68). Text in section updated:  
Extended decision filter index range adjusted to 0..4.  
Table 11-5, Current Consumption Details - Added SGMII note to table. (3) To  
estimate power for SGMII mode, use the SerDes mode power numbers provided.  
Table 11-22, Package Height - Table added. Provides a summary of package height  
information.  
2.41  
4/8/2009  
5/5/2009  
Section 7.1.4, Legacy Receive Descriptor Format and Section 7.2.2, Transmit  
Descriptors. Recommendation regarding legacy descriptors changed to ‘must not be  
used’ from ‘should not be used.’  
2.42  
2.43  
7/5/2009  
Internal release for test and review.  
10/2/2009  
MACSec capability exposed. You must have a MACSec-ready switch in order to com-  
plete the ecosystem and make use of MACSec functionality.  
Maintenance issues addressed:  
Section 7.2.4.7.2, TCP/IP/UDP Headers for the Subsequent Frames and Section  
7.2.4.7.3, TCP/IP/UDP Headers for the Last Frame updated to document UDP fields.  
Section 7.3.3.2, Interrupt Moderation and Section 8.8.12, Interrupt Throttle - EITR  
(0x01680 + 4*n [n = 0...24]; R/W) updated to correct minor issues; redundant  
data removed.  
Table 7-9, VLAN Tag Field Layout (for 802.1q Packet) - Note added to table that  
clarifies usage:  
NOTE: This table is relevant only if VMVIR.VLANA = 00b (use descriptor  
command) for the queue.  
Intel® 82576EB GbE Controller  
Datasheet  
4
Revision: 2.63  
December 2011  

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