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JL82576EBSLAVZ PDF预览

JL82576EBSLAVZ

更新时间： 2024-02-20 07:57:58
品牌 Logo 应用领域
英特尔 - INTEL 通信时钟局域网外围集成电路
页数 文件大小 规格书
934页 7188K
描述
LAN Controller, CMOS, PBGA576, 25 X 25 MM, 1 MM PITCH, BGA-576

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JL82576EBSLAVZ 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：BGA包装说明：BGA, BGA576,24X24,40
针数：576Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.75
地址总线宽度：边界扫描：NO
最大时钟频率：25 MHz通信协议：ASYNC, BIT; I2C
外部数据总线宽度：JESD-30 代码：S-PBGA-B576
长度：25 mm低功率模式：YES
端子数量：576最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA576,24X24,40
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：NOT SPECIFIED电源：1,1.8,3.3 V
认证状态：Not Qualified子类别：Serial IO/Communication Controllers
最大供电电压：1.89 V最小供电电压：1.71 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：1.27 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：25 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：1

JL82576EBSLAVZ 数据手册

 浏览型号JL82576EBSLAVZ的Datasheet PDF文件第1页浏览型号JL82576EBSLAVZ的Datasheet PDF文件第2页浏览型号JL82576EBSLAVZ的Datasheet PDF文件第4页浏览型号JL82576EBSLAVZ的Datasheet PDF文件第5页浏览型号JL82576EBSLAVZ的Datasheet PDF文件第6页浏览型号JL82576EBSLAVZ的Datasheet PDF文件第7页 
Revisions — Intel® 82576 GbE Controller  
Revisions  
Revision  
0.5  
Date  
Comments  
6/2007  
11/2007  
5/2008  
6/2008  
7/2008  
11/2008  
Initial availability.  
1.0  
Updates and corrections.  
PRQ release.  
1.9  
2.0  
SRA release.  
2.1  
Maintenance update. Added checklist chapter.  
Maintenance update.  
2.2  
•
•
ected device ID reference to 0x10C9.  
Section 3.3.1.7; Section 12.3.2.2.1 - EEPROM-less information updated; stronger  
statements about EEPROM-less design.  
•
•
Table 3-17 - Device ID corrected.  
GIO_PWR_GOOD updated to PERST# throughout.  
•
•
•
Section 6.1 - More PXE information documented. Entire section updated. See PXE  
listings on EEPROM map. Also, links added for entire EEPROM reference map.  
Section 7.10.3.5.1, Section 7.10.3.5.2- Notes added after VFRE filtering  
paragraphs in numbered list.  
Section 8.8.7, Section 8.8.8, Section 8.8.9, Section 8.8.10 - The ICR, ICS, IMS,  
IMC registers were corrected. See bit 3 in each.  
•
Chapter 10.0, System Manageability updated; organization changed; some  
additional information provided.  
•
•
•
Section 10.6.2.12 - Bit description in table updated (to 0x21).  
Table 10-10 - IPV4 and IPV6 filter parameter information corrected.  
Table 10-33 - List of supported commands has been updated.  
•
Table 11.4.2.1 - Current consumption data updated. See bold text in table. Also,  
see power data in summary on title page.  
•
•
Table 12-2 - Additional magnetics recommendation added.  
Section 6.2.18 - Bit 15 information updated; Enable WAKE# Assertion.  
Jumbo frame size consistently indicated at 9500 bytes (max).  
2.3  
2.4  
12/2008  
4/1/2009  
•
•
SKU 82576NS documented. The IPsec function is present in the 82576EB SKU.  
IPsec is not present in the 82576NS SKU. This is indicated throughout the  
document.  
•
Section 3.3.4.2, Flash Write Control - Typing correction. Note that attempts to write  
to the Flash device when writes are disabled (EEC.FWE=01b) should not be  
attempted.  
•
•
Section 3.4.2, Software Watchdog - Updated. Edited to describe the software  
interrupt (ICR[26]) and to reduce confusion.  
Section 3.5.6.5.1, Setting the 82576 to External PHY loopback Mode - Text added  
at the end of the section for clarity: The above procedure puts the device in PHY  
loopback mode. After using the procedure, wait for link to become up. Once PHY  
register 1 bit 2 is set (this can take up to 750ms), transmit and receive normally. If  
you are unable to get link after 750ms, reset the PHY using CTRL.PHY_RST and  
then repeat the above procedure. When exiting External PHY loopback mode, a full  
PHY reset must be done. Use CTRL.PHY_RST.  
320961-015EN  
Revision: 2.61  
December 2010  
Intel® 82576 GbE Controller  
Datasheet  
3
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