Datasheet > ISLA118P50_11

ISLA118P50_11

更新时间： 2024-09-29 11:13:11

品牌	Logo	应用领域
英特矽尔 - INTERSIL		转换器
页数	文件大小	规格书
34页	1325K
描述
8-Bit, 500MSPS A/D Converter

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中文翻译

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ISLA118P50_11 数据手册

8-Bit, 500MSPS A/D Converter

ISLA118P50

Features

• 1.15GHz Analog Input Bandwidth

• 90fs Clock Jitter

The ISLA118P50 is a low-power, high-performance, 500MSPS

analog-to-digital converter designed with Intersil’s proprietary

FemtoCharge™ technology on a standard CMOS process. The

ISLA118P50 is part of a pin-compatible portfolio of 8, 10 and

12-bit A/Ds. This device an upgrade of the KAD551XP-50

product family and is pin similar.

• Automatic Fine Interleave Correction Calibration

• Multiple Chip Time Alignment Support via the Synchronous

Clock Divider Reset

• Programmable Gain, Offset and Skew Control

• Over-Range Indicator

The device utilizes two time-interleaved 250MSPS unit A/Ds to

achieve the ultimate sample rate of 500MSPS. A single 500MHz

conversion clock is presented to the converter, and all interleave

clocking is managed internally. The proprietary Intersil Interleave

Engine (I2E) performs automatic fine correction of offset, gain,

and sample time skew mismatches between the unit A/Ds to

optimize performance. No external interleaving algorithm is

required.

• Clock Phase Selection

• Nap and Sleep Modes

• Two’s Complement, Gray Code or Binary Data Format

• DDR LVDS-Compatible or LVCMOS Outputs

• Programmable Test Patterns and Internal Temperature Sensor

A serial peripheral interface (SPI) port allows for extensive

configurability of the A/D. The SPI also controls the interleave

correction circuitry, allowing the system to issue continuous

calibration commands as well as configure many dynamic

parameters.

Applications

• Radar and Electronic/Signal Intelligence

• Broadband Communications

• High-Performance Data Acquisition

Digital output data is presented in selectable LVDS or CMOS

formats. The ISLA118P50 is available in a 72-contact QFN

package with an exposed paddle. Performance is specified over

the full industrial temperature range (-40°C to +85°C).

Pin-Compatible Family

SPEED

MODEL

ISLA112P50

RESOLUTION

(MSPS)

500

CLKP

CLKN

CLKOUTP

CLKOUTN

CLOCK

MANAGEMENT

ISLA110P50

ISLA118P50

500

Key Specifications

• SNR = 49.9dBFS for f = 190MHz (-1dBFS)

8 -BIT

250MSPS

ADC

D[7:0]P

D[7:0]N

SHA

• SFDR = 68dBc for f = 190MHz (-1dBFS)

VREF

ORP

ORN

DIGITAL

ERROR

• Total Power Consumption = 428mW

VINP

VINN

Gain/ Offset/ Skew

Adjustments

I2E

CORRECTION

OUTFMT

OUTMODE

8 -BIT

250MSPS

ADC

VCM

SHA

VREF

1.25V

–

SPI

CONTROL

FIGURE 1. BLOCK DIAGRAM

July 25, 2011

FN7565.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) and FemtoCharge are trademarks owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

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与ISLA118P50_11相关器件

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ISLA118P50IRZ	INTERSIL	获取价格	8-Bit, 500MSPS A/D Converter
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ISLA212P	RENESAS	获取价格	12-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P13	RENESAS	获取价格	16-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P13	INTERSIL	获取价格	16-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P13IR1Z	RENESAS	获取价格	12-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P13IRZ	INTERSIL	获取价格	12-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P13IRZ	RENESAS	获取价格	12-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P20	INTERSIL	获取价格	16-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA212P20	RENESAS	获取价格	16-Bit, 250MSPS/200MSPS/130MSPS ADC

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