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ISLA212P25IRZ PDF预览

ISLA212P25IRZ

更新时间： 2024-09-30 02:57:35
品牌 Logo 应用领域
瑞萨 - RENESAS 转换器
页数 文件大小 规格书
36页 1589K
描述
12-Bit, 250MSPS/200MSPS/130MSPS ADC

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中文翻译

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ISLA212P25IRZ 技术参数

生命周期：Unknown零件包装代码：QFN
包装说明：HVQCCN, LCC72,.39SQ,20针数：72
Reach Compliance Code：compliantECCN代码：3A001.A.5.A.3
HTS代码：8542.39.00.01风险等级：5.77
Is Samacsys：N最大模拟输入电压：2.1 V
最小模拟输入电压：-2.1 V最长转换时间：0.004 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：S-PQCC-N72
JESD-609代码：e4长度：10 mm
最大线性误差 (EL)：0.0439%湿度敏感等级：3
模拟输入通道数量：1位数：12
功能数量：1端子数量：72
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE输出格式：PARALLEL, WORD
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装等效代码：LCC72,.39SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：1.8 V认证状态：Not Qualified
采样速率：250 MHz采样并保持/跟踪并保持：SAMPLE
座面最大高度：0.9 mm子类别：Analog to Digital Converters
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：10 mm
Base Number Matches：1

ISLA212P25IRZ 数据手册

 浏览型号ISLA212P25IRZ的Datasheet PDF文件第2页浏览型号ISLA212P25IRZ的Datasheet PDF文件第3页浏览型号ISLA212P25IRZ的Datasheet PDF文件第4页浏览型号ISLA212P25IRZ的Datasheet PDF文件第5页浏览型号ISLA212P25IRZ的Datasheet PDF文件第6页浏览型号ISLA212P25IRZ的Datasheet PDF文件第7页 
DATASHEET  
ISLA212P  
12-Bit, 250MSPS/200MSPS/130MSPS ADC  
FN7717  
Rev 2.00  
November 30, 2012  
The ISLA212P is a series of low power, high performance  
12-bit analog-to-digital converters. Designed with Intersil’s  
proprietary FemtoCharge™ technology on a standard CMOS  
process, the series supports sampling rates of up to 250MSPS.  
The ISLA212P is part of a pin-compatible family of 12 to 16-bit  
A/Ds with maximum sample rates ranging from 130MSPS to  
500MSPS.  
Features  
• Single Supply 1.8V Operation  
• Clock Duty Cycle Stabilizer  
• 75fs Clock Jitter  
• 700MHz Bandwidth  
• Programmable Built-in Test Patterns  
• Multi-ADC Support  
A serial peripheral interface (SPI) port allows for extensive  
configurability, as well as fine control of various parameters  
such as gain and offset. Digital output data is presented in  
selectable LVDS or CMOS formats, and can be configured as  
full-width, single data rate (SDR) or half-width, double data  
rate (DDR). The ISLA212P is available in a 72-contact QFN  
package with an exposed paddle. Operating from a 1.8V  
supply, performance is specified over the full industrial  
temperature range (-40°C to +85°C).  
- SPI Programmable Fine Gain and Offset Control  
- Support for Multiple ADC Synchronization  
- Optimized Output Timing  
• Nap and Sleep Modes  
- 200µs Sleep Wake-up Time  
• Data Output Clock  
• SDR/DDR LVDS-Compatible or LVCMOS Outputs  
• Selectable Clock Divider  
Key Specifications  
• SNR @ 250/200/130MSPS  
70.5/71.0/71.5dBFS f = 30MHz  
IN  
68.7/68.9/68.8dBFS f = 363MHz  
IN  
Applications  
• Radar Array Processing  
• SFDR @ 250/200/130MSPS  
• Software Defined Radios  
83/83/88dBc f = 30MHz  
IN  
78/81/85dBc f = 363MHz  
IN  
• Total Power Consumption = 440mW @ 250MSPS  
• Broadband Communications  
• High-Performance Data Acquisition  
• Communications Test Equipment  
Pin-Compatible Family  
SPEED  
(MSPS)  
MODEL  
RESOLUTION  
ISLA216P25  
ISLA216P20  
ISLA216P13  
ISLA214P50  
ISLA214P25  
ISLA214P20  
ISLA214P13  
ISLA212P50  
ISLA212P25  
ISLA212P20  
ISLA212P13  
16  
16  
16  
14  
14  
14  
14  
12  
12  
12  
12  
250  
200  
130  
500  
250  
200  
130  
500  
250  
200  
130  
CLKP  
CLKOUTP  
CLKOUTN  
CLOCK  
MANAGEMENT  
CLKN  
VINP  
VINN  
12-BIT  
250 MSPS  
ADC  
D[11:0]P  
D[11:0]N  
SHA  
DIGITAL  
ERROR  
CORRECTION  
+
–
VCM  
SPI  
CONTROL  
FN7717 Rev 2.00  
November 30, 2012  
Page 1 of 36  
1234567...36

中文翻译

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